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* UefiPayloadPkg: Fix the build failureGuo Dong2021-07-012-5/+2
| | | | | | | | | | For non-universal payload, HandoffHobTable is used without initialization. This patch fixed this failure. Cc: Benjamin You <benjamin.you@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg/PayloadLoader: Remove assertionRay Ni2021-06-302-2/+0
| | | | | | | | | | | | | | For R_386_RELATIVE and R_X86_64_RELATIVE, today's logic assumes that the content pointed by the Rela->r_offset is 0 but it's not always TRUE. We observed that linker may set the content to Rela->r_addend. The patch removes the assertion. There is no functionality impact for this patch. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/PayloadLoader: Fix bug in locating relocation sectionRay Ni2021-06-302-14/+30
| | | | | | | | | | | | | | | | | | | | | Per ELF spec, the DT_REL/DT_RELA tag in dynamic section stores the virtual address of the relocation section. But today's code logic treats it as the section offset and finds the relocation section whose offset equals to DT_REL/DT_RELA. The logic can work when the section offset equals to the section virtual address. But when the ELF is generated from the link script that reserves a sizeof(pe_header) in the file beginning, the section offset doesn't equal to section virtual address. Such logic can not find the relocation section. The patch fixes this bug. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: consume the BootManagerMenuFile HOBduntan2021-06-243-2/+57
| | | | | | | | | | | Consume the BootManagerMenuFile HOB in PlatformBootManagerLib This Lib is in UefiPayloadPkg Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: DunTan <dun.tan@intel.com>
* UefiPayloadPkg: Add new structure for BootManagerMenuFile HOBduntan2021-06-242-0/+30
| | | | | | | | | | Add new structure for BootManagerMenuFile HOB in UefiPayloadPkg Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: DunTan <dun.tan@intel.com>
* UefiPayloadPkg: Add PcdResetOnMemoryTypeInformationChange in UefiPayloadPkgZhiguang Liu2021-06-241-0/+1
| | | | | | | | | | This PCD will be consumed by Universal Payload Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add PcdInstallAcpiSdtProtocol feature in UefiPayloadPkgZhiguang Liu2021-06-241-0/+2
| | | | | | | | | | To install ACPI SDT protocol, define PcdInstallAcpiSdtProtocol as TRUE. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add macro to enable and disable some driversZhiguang Liu2021-06-242-1/+14
| | | | | | | | | | | Add macro EMU_VARIABLE_ENABLE and DISABLE_RESET_SYSTEM to include or exclude some drivers from Payload Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Remove assert when reserve MMIO/IO resource for devicesZhiguang Liu2021-06-241-9/+11
| | | | | | | | | | | Some boot loader may already reserve MMIO/IO resource for IOAPIC and HPET, so remove the assert when reserve MMIO/IO resource for IOAPIC and HPET Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Include UniversalPayLoad modules in UefiPayloadPkg.dscZhiguang Liu2021-06-242-5/+20
| | | | | | | | | | Add a new macro "UNIVERSAL_PAYLOAD" to build Universal Payload. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Fix up UPL Pcd databaseZhiguang Liu2021-06-246-7/+119
| | | | | | | | | | | | | | | Edk2 bootloader will pass the pei pcd database, and UPL also contain a PCD database. Dxe PCD driver has the assumption that the two PCD database can be catenated and the local token number should be successive。 This patch will manually fix up the UPL PCD database to meet that assumption. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Get and enter DxeCore for Universal PayloadZhiguang Liu2021-06-245-4/+104
| | | | | | | | | | | | | From gUniversalPayloadExtraDataGuid Guid Hob, get the Dxe FV information, and get the Dxe Core from the FV. Also, make sure if there are muliple FV hob, the FV hob pointing to this FV will be the first in the hob list. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Create separate Payload Entry for UniversalPayloadZhiguang Liu2021-06-242-0/+402
| | | | | | | | | | | | | | This patch create the UniversalPayload Entry based on the UefiPayload Entry. It implements the logic to find a proper memory range to create the new Hob and migrate the Hobs from Bootloader. To make the change history clear, the logic to get the DxeCore will be in the next patch. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Update the function definition of HobConstructorZhiguang Liu2021-06-243-25/+22
| | | | | | | | | | | Update the function defination of HobConstructor to align the Phit Hob structure. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add a separate PlatformHookLib for Universal PayloadZhiguang Liu2021-06-242-0/+123
| | | | | | | | | | | Add a new separate PlatformHookLib for Universal Payload to consume Guid Hob gUniversalPayloadSerialPortInfoGuid to get serial port information Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Add HobLib for UniversalPayloadZhiguang Liu2021-06-2411-6/+838
| | | | | | | | | | | | | | | | | | | | | | | | | For payload entry, use PayloadEntryHobLib as HobLib and payload entry should initialize hob base. For DxeCore, use new added DxeHobLib as HobLib, and DxeCore will initialize hob base. For Dxe Driver, use new added DxeHobLib as HobLib, and use DxeHobListLib to initialize hob base. Adding a new library DxeHobLib + DxeHobListLib instead of using the DxeHobLib.inf in MdePkg is because the constructor needed be separated from DxeHobLib. If not, when building UefiPayloadPkg, the dependency chain is as below: DebugLib -> SerialPortLib -> PlatformHookLib -> HobLib -> DebugLib Each library has a constructor, and this becomes a constructor circle. To break the circle, separate the constructor from the HobLib as a new DxeHobListLib, which won't depend on DebugLib. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg/UefiPayloadEntry: Remove 4GB memory WAGuo Dong2021-06-221-5/+0
| | | | | | | | Previous it would hang in CpuDxe if DXE drivers are dispatched above 4GB. Now remove the work around since the fixed in CpuDxe are merged. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg/UefiPayloadEntry: Improve bootloader memrange parsingPatrick Rudolph2021-06-222-3/+197
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently several DXE crash due to invalid memory resource settings. The PciHostBridgeDxe which expects the MMCONF and PCI Aperature to be EfiMemoryMappedIO, but currently those regions are (partly) mapped as EfiReservedMemoryType. coreboot and slimbootloader provide an e820 compatible memory map, which doesn't work well with EDK2 as the e820 spec is missing MMIO regions. In e820 'reserved' could either mean "DRAM used by boot firmware" or "MMIO in use and not detectable by OS". Guess Top of lower usable DRAM (TOLUD) by walking the bootloader provided memory ranges. Memory types of RAM, ACPI and ACPI NVS below 4 GiB are used to increment TOLUD and reserved memory ranges touching TOLUD at the base are also assumed to be reserved DRAM, which increment TOLUD. Then mark everything reserved below TOLUD as EfiReservedMemoryType and everything reserved above TOLUD as EfiMemoryMappedIO. This fixes assertions seen in PciHostBridgeDxe. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Add PayloadLoaderPeim which can load ELF payloadRay Ni2021-06-1610-0/+3350
| | | | | | | | | | | | | | Per universal payload spec, the payload is in ELF format. The patch adds a payload loader that supports to load ELF image. The location of extra data sections whose names start with "upld." is stored in UNIVERSAL_PAYLOAD_EXTRA_DATA HOB. Signed-off-by: Maurice Ma <maurice.ma@intel.com> Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Use DynamicEx instead of Dynamic to pass PCD across binaryZhiguang Liu2021-06-161-2/+5
| | | | | | | | | | | | | | | | | | When passing PCD database from Edk2 boot loader to Universal Payload, the local token number in boot loader PCD database can be different with that in Payload PCD database. Dynamic PCD directly use local token number, while DynamicEx will search token number by Guid and ExTokenNumber, which are unique pair and can make sure finding the correct token number in boot loader's PCD database. Therefore, using DynamicEx instead of Dynamic. Also, explicitly define some PCDs as DynamicEx, or their default type will be Dynamic Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Create gUniversalPayloadAcpiTableGuid HobZhiguang Liu2021-06-167-23/+18
| | | | | | | | | | | | | | | From SysTableInfo Hob, get ACPI table address, and create gUniversalPayloadAcpiTableGuid Hob to store it. Remove directly adding ACPI table to ConfigurationTable. Dxe ACPI driver will parse it and install ACPI table from Guid Hob. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Create gUniversalPayloadSmbiosTableGuid HobZhiguang Liu2021-06-165-15/+17
| | | | | | | | | | | | | | From SysTableInfo Hob, get Smbios table address, and create gUniversalPayloadSmbiosTableGuid Hob to store it. Remove directly adding smbios table to ConfigurationTable. Dxe module SmbiosDxe will parse it and install smbios table from it. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: UefiPayload retrieve PCI root bridge from Guid HobZhiguang Liu2021-06-165-8/+162
| | | | | | | | | | | | | | UefiPayload parse gUniversalPayloadPciRootBridgeInfoGuid Guid Hob to retrieve PCI root bridges information. gUniversalPayloadPciRootBridgeInfoGuid Guid Hob should be created by Bootloader. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg: Get platform specific logic via protocol for BDSZhiguang Liu2021-06-164-3/+114
| | | | | | | | | | | | | | Currently, BDS driver will link a PlatformBootManagerLib, which contains platform specific logic. This patch get the platform specific logic from a protocol, so that platform logic for Boot manager can be in another binary. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UefiPayloadPkg/UefiPayloadPkg.dsc: Consume MicrocodeLibRay Ni2021-04-091-0/+1
| | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3303 Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Consume MdeLibs.dsc.inc for RegisterFilterLibDandan Bi2021-03-311-1/+4
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3246 MdeLibs.dsc.inc was added for some basic/default library instances provided by MdePkg and RegisterFilterLibNull Library was also added into it as the first version of MdeLibs.dsc.inc. So update platform dsc to consume MdeLibs.dsc.inc for RegisterFilterLibNull which will be consumed by IoLib and BaseLib. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg/PlatformBootManager: Connect console after EndOfDxeGuo Dong2021-02-121-2/+2
| | | | | | | | | | | Currently the console is connected before EndOfDxe causing OptionsROMs to be loaded, but their drivers aren't used and thus no GOP is installed. To make use of 3rdparty OptionROMs connect the console after EndOfDxe. Tested on Intel CFL board using Nvidia Quadro GPU. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Sunny Wang <sunnywang@hpe.com>
* UefiPayloadPkg: Fix PciLib dependency on BlSupportDxeGuo Dong2021-02-121-0/+5
| | | | | | | | | | | | | | | | The PciLib depends on PCDs - PcdPciExpressBaseAddress - PcdPciExpressBaseSize being updated by BlSupportDxe before MMCONF accesses are working. Add BlSupportDxe to APRIORI to start it first and get the system into an usable state where at least PCI accesses work reliable. Fixes a bug where BlSupportDxe is scheduled too late and other DXEs fail to load due to broken PCI access. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Enable NVMe supportGuo Dong2021-02-122-0/+2
| | | | | | Signed-off-by: Tim Crawford <tcrawford@system76.com> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: add OrderedCollectionLib class resolutionLaszlo Ersek2021-01-191-0/+1
| | | | | | | | | | | | | | | | | | | | A subsequent patch in the series will make the ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf instance dependent on the OrderedCollectionLib class. Because the shell binary in this platform consumes the above UefiShellCommandLib instance, resolve OrderedCollectionLib. Cc: Benjamin You <benjamin.you@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3151 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20210113085453.10168-6-lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Fix master by adding SafeIntLibGuo Dong2020-12-031-0/+1
| | | | | Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Remove PEI phase from PayloadGuo Dong2020-12-0228-1911/+3576
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3100 It is not necessary to have a PEI phase in the UEFI payload since no specific PEI task is required. This patch adds a UefiPayloadEntry driver to get UEFI Payload required information from the bootloaders, convert them into a HOB list, load DXE core and transfer control to it. Here is the change details: 1) Removed PEI phase, including Peicore, BlSupportPei, SecCore, etc. 2) Added UefiPayloadEntry driver. this is the only driver before DXE core. 3) Added Pure X64 support, dropped Pure IA32 (Could add later if required) 64bit payload with 32bit entry point is still supported. 4) Use one DSC file UefiPayloadPkg.dsc to support X64 and IA32X64 build. Removed UefiPayloadIa32.dsc and UefiPayloadIa32X64.dsc Tested with SBL and coreboot on QEMU. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg: Add VariablePolicy engine to UefiPayloadPkg platformBret Barkelew2020-11-172-0/+8
| | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=2522 Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Bret Barkelew <brbarkel@microsoft.com> Signed-off-by: Bret Barkelew <brbarkel@microsoft.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg: Support variable size MMCONF spaceMarcello Sylvester Bauer2020-09-163-1/+5
| | | | | | | | | | | | | | | | | | | | | The default size is still 256MiB, but will be overwritten by UefiPayloadPkg with the real MMCONF size. e.g.: On embedded AMD platforms the MMCONF window size is usually only 64MiB. Fixes crash on platforms not exposing 256 buses. Tested on: * AMD Stoney Ridge Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Cc: Patrick Rudolph <patrick.rudolph@9elements.com> Cc: Christian Walter <christian.walter@9elements.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Store the size of the MMCONF windowPatrick Rudolph2020-09-162-0/+4
| | | | | | | | | | | | | | | Store the real size of the Pcie Memory Mapped Address Space. This change is necessary to support variable size of MMCONF spaces. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Cc: Patrick Rudolph <patrick.rudolph@9elements.com> Cc: Christian Walter <christian.walter@9elements.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg:Remove x86 legacy UART defaultsGuo Dong2020-09-092-2/+2
| | | | | | | | | | | | The BaseSerialPortLib16550 does fallback to a fixed address UART defined by PcdSerialRegisterBase and does not initialize if it is zero. Do not assume a serial port at 0x3F8, otherwise it could cause errors during initialization of a non-existent serial port on non legacy platforms. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Prepare UefiPayloadPkg to use the VmgExitLib libraryTom Lendacky2020-08-162-0/+4
| | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Various CpuExceptionHandlerLib libraries will updated to use the new VmgExitLib library. To prevent any build breakage, update the UefiPayloadPkg DSC files that use a form of the CpuExceptionHandlerLib library to include the VmgExitLib library. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
* UefiPayloadPkg: Fix TerminalDxe build time configurableGuo Dong2020-07-132-4/+4
| | | | | | | | | This patch fixed the merge issue for the previous TerminalDxe patch. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Make TerminalDxe build time configurablePatrick Rudolph2020-07-113-0/+12
| | | | | | | | | | As the TerminalDxe significantly slows down the boot menu rendering, add the DISABLE_SERIAL_TERMINAL option to disable it at build time. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg:Fix NOOPT build failureGuo Dong2020-07-101-8/+24
| | | | | | | | | When build UEFI payload using NOOPT, it would build failure since the FV size. So this patch increases FV size to support NOOPT. If not NOOPT build, there is no change to FV size. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in AcpiBoardInfo HOBRay Ni2020-06-246-9/+119
| | | | | | | | | | | | | | | | Today's UefiPayloadPkg always uses 0xE0000000 as the PCIE base address and ignores the value set in AcpiBoardInfo HOB created by the boot loader. This makes the payload binary cannot work in environment where the PCIE base address set by boot loader doesn't equal to 0xE0000000. The patch enhances UefiPayloadPkg so that the PCIE base address set by boot loader in the AcpiBoardInfo HOB is used. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/UefiPayloadPkgIa*.dsc: Change some PCDs typeTan, Ming2020-06-182-14/+14
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2786 Since the type of PcdStatusCodeUseSerial and PcdStatusCodeUseMemory in MdeModulePkg.dec are changed, so change them from PcdsFeatureFlag to PcdsFixedAtBuild in dsc files. Cc: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Ming Tan <ming.tan@intel.com>
* UefiPayloadPkg: remove EnterS3WithImmediateWake () from ResetSystemLibArd Biesheuvel2020-01-101-18/+0
| | | | | | | | EnterS3WithImmediateWake () no longer has any callers, so remove it from ResetSystemLib. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg/BootManager: Add PS2 keyboard supportDong, Guo2020-01-024-5/+33
| | | | | | | | | | | | | | | | Add PS2 keyboard support. REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2316 This patch adds PS2 keyboard support in boot manager, and add a build flag PS2_KEYBOARD_ENABLE for PS2 keyboard to build PS2 keyboard driver and SIO driver. Be default the build flag is not enabled since PS2 keyboard is not common used. could use -DPS2_KEYBOARD_ENABLE to enable build it if need this feature. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Benjamin You <benjamin.you@intel.com>
* UefiPayloadPkg/BlSupportDxe: fix ReserveResourceInGcd() callsLaszlo Ersek2019-10-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | The last parameter of ReserveResourceInGcd() is "ImageHandle", forwarded in turn to gDS->AllocateMemorySpace() or gDS->AllocateIoSpace() as "owner" image handle. But BlDxeEntryPoint() passes "SystemTable" as "ImageHandle". Compilers have not flagged it because EFI_HANDLE (the type of "ImageHandle") is unfortunately specified as (VOID*), and (EFI_SYSTEM_TABLE*) converts to (VOID*) silently. Hand the entry point function's "ImageHandle" parameter to ReserveResourceInGcd(). This fixes an actual bug. Cc: Benjamin You <benjamin.you@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* UefiPayloadPkg/BlSupportPei: fix MMCONFIG assignment from XSDTLaszlo Ersek2019-10-091-8/+11
| | | | | | | | | | | | | | | | | | | | | | | (This patch is unrelated to the rest of this series; its purpose is to enable building the UefiPayloadPkg DSC files with GCC.) When building "UefiPayloadPkg/UefiPayloadPkgIa32.dsc" with GCC48 for the DEBUG target, the compiler reports that "Entry32" may be used uninitialized in ParseAcpiInfo(), in the XSDT branch. Code inspection proves the compiler right. In the XSDT branch, the code from the RSDT branch must have been duplicated, and "Entry32" references were replaced with "Entry64" -- except where "MmCfgHdr" is assigned. Fix this bug by introducing a helper variable called "Signature", so that we have to refer to "Entry32" or "Entry64" only once per loop body. Cc: Benjamin You <benjamin.you@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* UefiPayloadPkg: Remove legacy PIC 8259 driverDong, Guo2019-06-213-3/+0
| | | | | | | | | | | Since legacy PIC 8259 driver would be removed from edk2, update UEFI payload to remove 8259 driver. If required, bootloader could disable 8259. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* UefiPayloadPkg/PlatformBootManagerLib: Use EDKII_SERIAL_PORT_LIB_VENDOR_GUID ↵Anthony PERARD2019-06-141-1/+2
| | | | | | | | | | | | from MdeModulePkg EDKII_SERIAL_PORT_LIB_VENDOR_GUID is now defined in MdeModulePkg, simply use it. Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20190606131459.1464-5-anthony.perard@citrix.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* Revert "UefiPayloadPkg: Remove legacy PIC 8259 driver"Liming Gao2019-06-063-0/+3
| | | | | | | | | | | This reverts commit a1539c46958fb896dee8f7987f4a98e9f9d10796. This change will be pushed after edk2-stable201905 Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* UefiPayloadPkg: Remove legacy PIC 8259 driverDong, Guo2019-06-043-3/+0
| | | | | | | | | | | Since legacy PIC 8259 driver would be removed from edk2, update UEFI payload to remove 8259 driver. If required, bootloader could disable 8259. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
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