| Commit message (Collapse) | Author | Age | Files | Lines |
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4873
Currently the function does not cover the 5 level paging case. it will
casued pagetable protection region set incorrectly. This patch do the
enhancemant and with the patch protection region has been set correctly.
Signed-off-by: Ning Feng <ning.feng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
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Now that the ResetVectors are USER_DEFINED modules, they will not
be linked against StackCheckLibNull, which were the only modules
causing issues. So, we can now remove the kludge we had before
and the requirement for every DSC to include StackCheckLibNull
for SEC modules and just apply StackCheckLibNull globally.
This also changes every DSC to drop the SEC definition of
StackCheckLibNull.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
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There are couples of gUniversalPayloadAcpiTableGuid in
payload , only build one
gUniversalPayloadAcpiTableGuid hob and acpi memory hob.
when the reserved memory address matched the rsdp.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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Per other platform request , need to add SMBIOS device node into FDT.
In the current phase(1) , only supporting SM3EntryPoint structure.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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Per Spec updated , update DMA Reg property filed
with each root bridge bus base and its bus limit.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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Introduce Secure Boot functionality within UefiPayloadPkg by adding
necessary modules and configurations. A new build flag,
`SECURE_BOOT_ENABLE`, is introduced to control the activation of
Secure Boot.
This patch also overrides values in SecurityPkg to enforce image
verification from all sources.
A new FV (`SECURITY_FV`) for security modules is added for components
and the firmware volume sizes to accommodate additional Secure Boot
components.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
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Adjust the sequence of gEfiEndOfPeiSignalPpiGuid notify function
when FDT is disabled , or some of notify functions won't work
cause the debug message print twice.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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There is currently a mix on functions named as Prop or Property.
The latter is in majority, and the better fit for tianocore coding style,
so rename FdtNodeOffsetByPropValue () and FdtSetProp () for consistency.
To avoid breaking bisect, change existing users in UefiPayloadPkg.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
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FdtNumRsv and FdtGetMemRsv were added for the benefit of UefiPayloadPkg,
but their naming matches neither upstream libfdt nor tianocore coding
style rules. And there was scope for improvement of the doxygen
descriptions as well.
These functions currently have only one in-tree user, UefiPayloadPkg
FdtParserLib. So rename them more conformant
FdtGetNumberOfReserveMapEntries
and
FdtGetReserveMapEntry
and update the description comment blocks, at the same time as
updating the existing user.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
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Enhance and introduce environment construction and
build step for ELF and FIT format payload
Signed-off-by: Gua Guo <gua.guo@intel.com>
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S3 performance table is saved to LockBox. Without LockBox, S3 performance
data will lost.
Add LOCKBOX_SUPPORT to optionally select LockBox libary instance,
default value is FALSE.
Signed-off-by: Zhou Jianfeng <jianfeng.zhou@intel.com>
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Currently, FIT Payload data relocation data has
some minor error with Universal Payload
Specification v0.9.1 section 2.4.3.
Signed-off-by: Gua Guo <gua.guo@intel.com>
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Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
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ACPI FADT HW register interface fields are
optional but current UPL common entry code made it
as mandatory which caused compatibility issue on
some platforms.
Solution is to move those FADT HW register fields
check code to consumer code so only ASSERT when
those fields are consumed with error.
Currently only AcpiTimerLib and ResetSystemLib
consuming those register fields so if platforms
configured UPL to different library instances the
FADT HW register fields are not consumed thus will
not cause ASSERT.
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
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DT has a way to provide reserved images in a simpler tabular
manner. UPL should be able to support that.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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In order to properly enable multisegment RB, we need
to grab ecam data from the FDT for each bridge.
Current UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES struct from
MdeModulePkg does not include definition for ecam. In
order to maintain backward compatibility and also avoid
diverging too much from core, we are going to define a
new HOB for UPL segment information and pass it to
GetPciSegmentInfo function. Ths function then grabs specifically
ecam info from the segment hob along with other rb specific
information to create final RB info required by multi segment
PCI driver.
Additionally we would like to support legacy implementations which
rely on ACPIBoard HOB to fill up segment info. So if UplSegmentInfo Hob
is not found we try and look for other hob.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
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We need to let UEFI know that there are cetain memory types
which are special purpose (CXL/HBM) etc and we may want to
avoid using them for UEFI purposes. Hence UPL needs to know
about such memory types.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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We do not need to go deep into verifying all ACPI tables
at this stage. TODO: Just a simple ACPI header signature
check should be good enough. For now just commenting out
asserts that mandate one to have various tables which is
not applicable to all platforms.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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As per specification we are going to accept only one argument
at the entry point which is FDT pointer. Grab that and call
the entry point.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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Expose UPL required PCDs for RISC-V Arch
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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Not every node has compatible property; avoid parsing nodes
which return NULL.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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Option node provides info that is to be consumed by during
metadata creation for other nodes like root bridge; pci-enum-done
etc. Handle that dependency by storing option values in a variable
and then apply it during post processing. Ideally such cross node
dependency should be avoided in design. Scope for futher improvements.
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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Add null implementation of StackCheckLib
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
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Adds an entry to the package's CI configuration file that enable policy
5 for stuart_pr_eval. With this Policy, all INFs used by the package are
extracted from the provided DSC file and compared against the list of
changed *.inf (INF) files in the PR. If there is a match, stuart_pr_eval
will specify that this package is affected by the PR and needs to be
tested.
Signed-off-by: Joey Vagedes <joey.vagedes@gmail.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Add FDT detection and comsume FDT when needed.
Move some x86 specific function in the x86 folder.
Create HandOffHob via FDT memory node.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Create FDT nodes (reserved-memory, serial, pci-rb, options) in
FdtPpiNotifyCallback function right after gEfiEndOfPeiSignalPpiGuid.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Add FDTParser and CustomFdtNodePaser
to retrive all FDT node and create the relate hobs.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Initialize mUartInfo with PCD for debug message
when Hob was not available.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786
Add Library header, DeviceTree hob header and PCD definitions.
Signed-off-by: Linus Liu <linus.liu@intel.com>
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When cspell is installed (via `npm install cspell`), CI checks for
spelling mistakes. There are currently a very large number of them: some
are genuine mistakes while others are words or acryonyms that cspell
doesn't know.
Fix a few of the misspellings in UefiPayloadPkg.
Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4808
Synchronize the use of the PCD PcieResizableBar
attribute state
Signed-off-by: KasimX Liu <kasimx.liu@intel.com>
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Leverage generic HOB print code in MdeModulePkg/Library/HobPrintLib.
Print UefiPayload specified GUID HOB info as custom HOB print handler
when calling the PrintHobList() interface.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
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Provide commandline configuration to select proper platform file.
Cc: Gua Guo <gua.guo@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: James Lu <james.lu@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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Fix calculation of first section in FileFindSection for FILE2 headers
in UefiPayloadEntry module.
Signed-off-by: Sebastian Witt <sebastian.witt@siemens.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
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Update ReadMe.md for swig install process in
windows OS.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
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This patch just includes SmmRelocationLib in UefiPayloadPkg.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
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BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
The MpInitLib library will be updated to use the new AmdSvsmLib library.
To prevent any build breakage, update the UefiPayloadPkg DSC file to
include the AmdSvsmLib NULL library.
Cc: Gua Guo <gua.guo@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: James Lu <james.lu@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
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Rely on AutoGen for declaring ProcessLibraryConstructorList().
Build-tested with:
python UefiPayloadPkg/UniversalPayloadBuild.py -a X64 -b DEBUG -t GCC5
python UefiPayloadPkg/UniversalPayloadBuild.py -a X64 -b DEBUG -f \
-t GCC5
build -a X64 -b DEBUG -p UefiPayloadPkg/UefiPayloadPkg.dsc -t GCC5 \
-D BUILD_ARCH=X64
Cc: Gua Guo <gua.guo@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: James Lu <james.lu@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-11-lersek@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
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Current DSC files contains a lot of files which are
specific to X86 arch. Need to move around files under
arch specific sections.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
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After 11ad164bcea6b0ed3628d merge,
ELF format API won't meet backward requirement.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
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Below Guid is redundant code on UefiPayloadPkg.dec
1. gBmpImageGuid
2. gPlatformGOPPolicyGuid
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
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Current implementation makes assumptions about arch it will be built
for. Need to make it more generic to add follow up support for RISCV.
Right now it does not build for RV until relevant dsc file is available.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4661
There is potential build problem when CRYPTO_PROTOCOL_SUPPORT
is set to TRUE and CRYPTO_DRIVER_EXTERNAL_SUPPORT is set to TRUE
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: MarsX Lin <marsx.lin@intel.com>
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Crypto in serveral case will use old version or latest version,
Platform may choose to only update Crypto drivers without updating
whole UPL, in this case the Crypto driver will provide by platform
payload outside the common UPL binary.
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
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The IMD entry uses the 32bit start field as relative offset
to root. On Ia32X64 this works fine as UINTN is also 32 bit and
negative relative offsets are properly calculated due to an
integer overflow.
On X64 this doesn't work as UINTN is 64 bit and the offset
is no longer subtracted, but it's added to the root. Fix that
by sign extending the start field to 64 bit.
Test: Booting UefiPayloadPkg still works on Ia32X64 and now also
works on X64.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4166
Fix integer overflow in various CreateHob instances.
Fixes: CVE-2022-36765
The CreateHob() function aligns the requested size to 8
performing the following operation:
```
HobLength = (UINT16)((HobLength + 0x7) & (~0x7));
```
No checks are performed to ensure this value doesn't
overflow, and could lead to CreateHob() returning a smaller
HOB than requested, which could lead to OOB HOB accesses.
Reported-by: Marc Beatove <mbeatove@google.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Cc: John Mathew <john.mathews@intel.com>
Authored-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
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It's too early to check the SCI enable status, which is set in the BDS
phase ususally. Remove the check from UPL.
Reviewed-by: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Signed-off-by: Gang Chen <gang.c.chen@intel.com>
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Add macro to enable selection of timer
- HPET: UEFI Payload will use HPET timer
- LAPIC: UEFI Payload will use local APIC timer
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Hua Ma <hua.ma@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
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This patch is to specify SmmCpuSyncLib instance for UefiPayloadPkg.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
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