1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
|
/** @file
*
* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2014-2020, Linaro Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
**/
#include <PiPei.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
#include <Library/PeiServicesLib.h>
#include <Library/FdtSerialPortAddressLib.h>
#include <libfdt.h>
#include <Guid/EarlyPL011BaseAddress.h>
#include <Guid/FdtHob.h>
STATIC CONST EFI_PEI_PPI_DESCRIPTOR mTpm2DiscoveredPpi = {
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gOvmfTpmDiscoveredPpiGuid,
NULL
};
STATIC CONST EFI_PEI_PPI_DESCRIPTOR mTpm2InitializationDonePpi = {
EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
&gPeiTpmInitializationDonePpiGuid,
NULL
};
EFI_STATUS
EFIAPI
PlatformPeim (
VOID
)
{
VOID *Base;
VOID *NewBase;
UINTN FdtSize;
UINTN FdtPages;
UINT64 *FdtHobData;
UINT64 *UartHobData;
FDT_SERIAL_PORTS Ports;
INT32 Node, Prev;
INT32 Parent, Depth;
CONST CHAR8 *Compatible;
CONST CHAR8 *CompItem;
INT32 Len;
INT32 RangesLen;
CONST UINT64 *RegProp;
CONST UINT32 *RangesProp;
UINT64 TpmBase;
EFI_STATUS Status;
Base = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
ASSERT (Base != NULL);
ASSERT (fdt_check_header (Base) == 0);
FdtSize = fdt_totalsize (Base) + PcdGet32 (PcdDeviceTreeAllocationPadding);
FdtPages = EFI_SIZE_TO_PAGES (FdtSize);
NewBase = AllocatePages (FdtPages);
ASSERT (NewBase != NULL);
fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));
FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData);
ASSERT (FdtHobData != NULL);
*FdtHobData = (UINTN)NewBase;
UartHobData = BuildGuidHob (&gEarlyPL011BaseAddressGuid, sizeof *UartHobData);
ASSERT (UartHobData != NULL);
*UartHobData = 0;
Status = FdtSerialGetPorts (Base, "arm,pl011", &Ports);
if (!EFI_ERROR (Status)) {
UINT64 UartBase;
//
// Default to the first port found, but (if there are multiple ports) allow
// the "/chosen" node to override it. Note that if FdtSerialGetConsolePort()
// fails, it does not modify UartBase.
//
UartBase = Ports.BaseAddress[0];
if (Ports.NumberOfPorts > 1) {
FdtSerialGetConsolePort (Base, &UartBase);
}
DEBUG ((DEBUG_INFO, "%a: PL011 UART @ 0x%lx\n", __func__, UartBase));
*UartHobData = UartBase;
}
TpmBase = 0;
//
// Set Parent to suppress incorrect compiler/analyzer warnings.
//
Parent = 0;
for (Prev = Depth = 0; ; Prev = Node) {
Node = fdt_next_node (Base, Prev, &Depth);
if (Node < 0) {
break;
}
if (Depth == 1) {
Parent = Node;
}
Compatible = fdt_getprop (Base, Node, "compatible", &Len);
//
// Iterate over the NULL-separated items in the compatible string
//
for (CompItem = Compatible; CompItem != NULL && CompItem < Compatible + Len;
CompItem += 1 + AsciiStrLen (CompItem))
{
if (FeaturePcdGet (PcdTpm2SupportEnabled) &&
(AsciiStrCmp (CompItem, "tcg,tpm-tis-mmio") == 0))
{
RegProp = fdt_getprop (Base, Node, "reg", &Len);
ASSERT (Len == 8 || Len == 16);
if (Len == 8) {
TpmBase = fdt32_to_cpu (RegProp[0]);
} else if (Len == 16) {
TpmBase = fdt64_to_cpu (ReadUnaligned64 ((UINT64 *)RegProp));
}
if (Depth > 1) {
//
// QEMU/mach-virt may put the TPM on the platform bus, in which case
// we have to take its 'ranges' property into account to translate the
// MMIO address. This consists of a <child base, parent base, size>
// tuple, where the child base and the size use the same number of
// cells as the 'reg' property above, and the parent base uses 2 cells
//
RangesProp = fdt_getprop (Base, Parent, "ranges", &RangesLen);
ASSERT (RangesProp != NULL);
//
// a plain 'ranges' attribute without a value implies a 1:1 mapping
//
if (RangesLen != 0) {
//
// assume a single translated range with 2 cells for the parent base
//
if (RangesLen != Len + 2 * sizeof (UINT32)) {
DEBUG ((
DEBUG_WARN,
"%a: 'ranges' property has unexpected size %d\n",
__func__,
RangesLen
));
break;
}
if (Len == 8) {
TpmBase -= fdt32_to_cpu (RangesProp[0]);
} else {
TpmBase -= fdt64_to_cpu (ReadUnaligned64 ((UINT64 *)RangesProp));
}
//
// advance RangesProp to the parent bus address
//
RangesProp = (UINT32 *)((UINT8 *)RangesProp + Len / 2);
TpmBase += fdt64_to_cpu (ReadUnaligned64 ((UINT64 *)RangesProp));
}
}
break;
}
}
}
if (FeaturePcdGet (PcdTpm2SupportEnabled)) {
if (TpmBase != 0) {
DEBUG ((DEBUG_INFO, "%a: TPM @ 0x%lx\n", __func__, TpmBase));
Status = (EFI_STATUS)PcdSet64S (PcdTpmBaseAddress, TpmBase);
ASSERT_EFI_ERROR (Status);
Status = PeiServicesInstallPpi (&mTpm2DiscoveredPpi);
} else {
Status = PeiServicesInstallPpi (&mTpm2InitializationDonePpi);
}
ASSERT_EFI_ERROR (Status);
}
BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
return EFI_SUCCESS;
}
|
