summaryrefslogtreecommitdiffstats
path: root/EmbeddedPkg/Drivers/Isp1761UsbDxe/Isp1761UsbDxe.c
blob: 3ad453595bcdffc6c525c330ccefccbe0fd1bb74 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
/** @file

  Copyright (c) 2013-2015, ARM Ltd. All rights reserved.<BR>

  SPDX-License-Identifier: BSD-2-Clause-Patent

**/

#include <Library/DebugLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiDriverEntryPoint.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>

#include <IndustryStandard/Usb.h>

#include <Protocol/UsbDevice.h>

#include "Isp1761UsbDxe.h"

/*
  Driver for using the NXP ISP1761 as a USB Peripheral controller.
  Doesn't use USB OTG - just sets it in Pure Peripheral mode.

  The ISP1582 datasheet has a little more info on the Peripheral controller
  registers than the ISP1761 datasheet

  We don't do string descriptors. They're optional.
  We currently assume the device has one configuration, one interface, one IN
  endpoint, and one OUT endpoint (plus the default control endpoint).

  In fact, this driver is the minimum required to implement fastboot.
*/

// TODO Make sure the controller isn't sending empty packets when it shouldn't
// (check behaviour in cases when Buffer Length isn't explicitly set)

// ISP1582 Datasheet:
// "Data transfers preceding the status stage must first be fully
// completed before the STATUS bit can be set."
// This variable stores whether some control data has been pended in the EP0TX
// Tx buffer, so that when an EP0TX interrupt is received we can set the STATUS
// bit to go to the Status stage of the control transfer.
STATIC BOOLEAN mControlTxPending = FALSE;

STATIC USB_DEVICE_DESCRIPTOR    *mDeviceDescriptor;

// The config descriptor, interface descriptor, and endpoint descriptors in a
// buffer (in that order)
STATIC VOID                     *mDescriptors;
// Convenience pointers to those descriptors inside the buffer:
STATIC USB_INTERFACE_DESCRIPTOR *mInterfaceDescriptor;
STATIC USB_CONFIG_DESCRIPTOR    *mConfigDescriptor;
STATIC USB_ENDPOINT_DESCRIPTOR  *mEndpointDescriptors;

STATIC USB_DEVICE_RX_CALLBACK   mDataReceivedCallback;
STATIC USB_DEVICE_TX_CALLBACK   mDataSentCallback;

// The time between interrupt polls, in units of 100 nanoseconds
// 10 Microseconds
#define ISP1761_INTERRUPT_POLL_PERIOD 10000

STATIC
VOID
SelectEndpoint (
  IN UINT8 Endpoint
  )
{
  // The DMA Endpoint Index must not point to the same as the
  // Endpoint Index Register.
  WRITE_REG32 (ISP1761_DMA_ENDPOINT_INDEX, ((Endpoint + 2) % ISP1761_NUM_ENDPOINTS));
  WRITE_REG32 (ISP1761_ENDPOINT_INDEX, Endpoint);
}

// Enable going to the Data stage of a control transfer
STATIC
VOID
DataStageEnable (
  IN UINT8 Endpoint
  )
{
  SelectEndpoint (Endpoint);
  WRITE_REG32 (ISP1761_CTRL_FUNCTION, ISP1761_CTRL_FUNCTION_DSEN);
}

// Go to the Status stage of a successful control transfer
STATIC
VOID
StatusAcknowledge (
  IN UINT8 Endpoint
)
{
  SelectEndpoint (Endpoint);
  WRITE_REG32 (ISP1761_CTRL_FUNCTION, ISP1761_CTRL_FUNCTION_STATUS);
}

// Read the FIFO for the endpoint indexed by Endpoint, into the buffer pointed
// at by Buffer, whose size is *Size bytes.
//
// If *Size is less than the number of bytes in the FIFO, return EFI_BUFFER_TOO_SMALL
//
// Update *Size with the number of bytes of data in the FIFO.
STATIC
EFI_STATUS
ReadEndpointBuffer (
  IN      UINT8   Endpoint,
  IN OUT  UINTN  *Size,
  IN OUT  VOID   *Buffer
  )
{
  UINT16  NumBytesAvailable;
  UINT32  Val32;
  UINTN   Index;
  UINTN   NumBytesRead;

  SelectEndpoint (Endpoint);

  NumBytesAvailable = READ_REG16 (ISP1761_BUFFER_LENGTH);

  if (NumBytesAvailable > *Size) {
    *Size = NumBytesAvailable;
    return EFI_BUFFER_TOO_SMALL;
  }
  *Size = NumBytesAvailable;

  /* -- NB! --
    The datasheet says the Data Port is 16 bits but it actually appears to
    be 32 bits.
   */

  // Read 32-bit chunks
  for (Index = 0; Index < NumBytesAvailable / 4; Index++) {
    ((UINT32 *) Buffer)[Index] = READ_REG32 (ISP1761_DATA_PORT);
  }

  // Read remaining bytes

  // Round NumBytesAvailable down to nearest power of 4
  NumBytesRead = NumBytesAvailable & (~0x3);
  if (NumBytesRead != NumBytesAvailable) {
    Val32 = READ_REG32 (ISP1761_DATA_PORT);
    // Copy each required byte of 32-bit word into buffer
    for (Index = 0; Index < NumBytesAvailable % 4; Index++) {
      ((UINT8 *) Buffer)[NumBytesRead + Index] = Val32 >> (Index * 8);
    }
  }
  return EFI_SUCCESS;
}

/*
  Write an endpoint buffer. Parameters:
  Endpoint        Endpoint index (see Endpoint Index Register in datasheet)
  MaxPacketSize   The MaxPacketSize this endpoint is configured for
  Size            The size of the Buffer
  Buffer          The data

  Assumes MaxPacketSize is a multiple of 4.
  (It seems that all valid values for MaxPacketSize _are_ multiples of 4)
*/
STATIC
EFI_STATUS
WriteEndpointBuffer (
  IN       UINT8   Endpoint,
  IN       UINTN   MaxPacketSize,
  IN       UINTN   Size,
  IN CONST VOID   *Buffer
  )
{
  UINTN    Index;
  UINT32  *DwordBuffer;

  DwordBuffer = (UINT32 *) Buffer;
  SelectEndpoint (Endpoint);

  /* -- NB! --
    The datasheet says the Data Port is 16 bits but it actually appears to
    be 32 bits.
   */

  // Write packets of size MaxPacketSize
  while (Size > MaxPacketSize) {
    for (Index = 0; Index < MaxPacketSize / 4; Index++) {
      WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[Index]);
    }
    Size -= MaxPacketSize;
    DwordBuffer += (MaxPacketSize / sizeof (UINT32));
  }

  // Write remaining data

  if (Size > 0) {
    WRITE_REG32 (ISP1761_BUFFER_LENGTH, Size);

    while (Size > 4) {
      WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[0]);
      Size -= 4;
      DwordBuffer++;
    }

    if (Size > 0) {
      WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[0]);
    }
  }

  return EFI_SUCCESS;
}

STATIC
EFI_STATUS
HandleGetDescriptor (
  IN USB_DEVICE_REQUEST  *Request
  )
{
  EFI_STATUS  Status;
  UINT8       DescriptorType;
  UINTN       ResponseSize;
  VOID       *ResponseData;

  ResponseSize = 0;
  ResponseData = NULL;
  Status = EFI_SUCCESS;

  // Pretty confused if bmRequestType is anything but this:
  ASSERT (Request->RequestType == USB_DEV_GET_DESCRIPTOR_REQ_TYPE);

  // Choose the response
  DescriptorType = Request->Value >> 8;
  switch (DescriptorType) {
  case USB_DESC_TYPE_DEVICE:
    DEBUG ((EFI_D_INFO, "USB: Got a request for device descriptor\n"));
    ResponseSize = sizeof (USB_DEVICE_DESCRIPTOR);
    ResponseData = mDeviceDescriptor;
    break;
  case USB_DESC_TYPE_CONFIG:
    DEBUG ((EFI_D_INFO, "USB: Got a request for config descriptor\n"));
    ResponseSize = mConfigDescriptor->TotalLength;
    ResponseData = mDescriptors;
    break;
  case USB_DESC_TYPE_STRING:
    DEBUG ((EFI_D_INFO, "USB: Got a request for String descriptor %d\n", Request->Value & 0xFF));
    break;
  default:
    DEBUG ((EFI_D_INFO, "USB: Didn't understand request for descriptor 0x%04x\n", Request->Value));
    Status = EFI_NOT_FOUND;
    break;
  }

  // Send the response
  if (ResponseData) {
    ASSERT (ResponseSize != 0);

    if (Request->Length < ResponseSize) {
      // Truncate response
      ResponseSize = Request->Length;
    } else if (Request->Length > ResponseSize) {
      DEBUG ((EFI_D_INFO, "USB: Info: ResponseSize < wLength\n"));
    }

    DataStageEnable (ISP1761_EP0TX);
    Status = WriteEndpointBuffer (
              ISP1761_EP0TX,
              MAX_PACKET_SIZE_CONTROL,
              ResponseSize,
              ResponseData
              );
    if (!EFI_ERROR (Status)) {
      // Setting this value should cause us to go to the Status stage on the
      // next EP0TX interrupt
      mControlTxPending = TRUE;
    }
  }

  return EFI_SUCCESS;
}

STATIC
EFI_STATUS
HandleSetAddress (
  IN USB_DEVICE_REQUEST  *Request
  )
{
  // Pretty confused if bmRequestType is anything but this:
  ASSERT (Request->RequestType == USB_DEV_SET_ADDRESS_REQ_TYPE);
  // USB Spec: "The USB device does not change its device address until after
  // the Status stage of this request is completed successfully."
  // ISP1582 datasheet: "The new device address is activated when the
  // device receives an acknowledgment from the host for the empty packet
  // token". (StatusAcknowledge causes an empty packet to be sent).
  // So, we write the Address register _before_ acking the SET_ADDRESS.
  DEBUG ((EFI_D_INFO, "USB: Setting address to %d\n", Request->Value));
  WRITE_REG32 (ISP1761_ADDRESS, Request->Value | ISP1761_ADDRESS_DEVEN);
  StatusAcknowledge (ISP1761_EP0TX);

  return EFI_SUCCESS;
}

// Move the device to the Configured state.
// (This code only supports one configuration for a device, so the configuration
//  index is ignored)
STATIC
EFI_STATUS
HandleSetConfiguration (
  IN USB_DEVICE_REQUEST  *Request
  )
{
  USB_ENDPOINT_DESCRIPTOR  *EPDesc;
  UINTN                     Index;
  UINT8                     EndpointIndex;

  ASSERT (Request->RequestType == USB_DEV_SET_CONFIGURATION_REQ_TYPE);
  DEBUG ((EFI_D_INFO, "USB: Setting configuration.\n"));

  // Configure endpoints
  for (Index = 0; Index < mInterfaceDescriptor->NumEndpoints; Index++) {
    EPDesc = &mEndpointDescriptors[Index];

    // To simplify for now, assume endpoints aren't "sparse", and are in order.
    ASSERT ((EPDesc->EndpointAddress & 0xF) == ((Index / 2) + 1));

    // Convert from USB endpoint index to ISP1761 endpoint Index
    // USB:     Endpoint number is bits [3:0], IN/OUT is bit [7]
    // ISP1761: Endpoint number is bits [4:1], IN/OUT is bit [0]
    EndpointIndex = ((EPDesc->EndpointAddress & 0xF) << 1) |
                    ((EPDesc->EndpointAddress & BIT7) >> 7);
    SelectEndpoint (EndpointIndex);
    // Set endpoint type (Bulk/Isochronous/Interrupt)
    WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, EPDesc->MaxPacketSize);
    // Hardware foible (bug?): Although the datasheet seems to suggest it should
    // automatically be set to MaxPacketSize, the Buffer Length register appears
    // to be reset to 0, which causes an empty packet to be sent in response to
    // the first IN token of the session. The NOEMPKT field of the Endpoint Type
    // register sounds like it might fix this problem, but it doesn't
    // (it's "applicable only in the DMA mode").
    WRITE_REG32 (ISP1761_BUFFER_LENGTH, EPDesc->MaxPacketSize);
    WRITE_REG32 (ISP1761_ENDPOINT_TYPE, (EPDesc->Attributes & 0x3) |
                                        ISP1761_ENDPOINT_TYPE_ENABLE);
  }

  StatusAcknowledge (ISP1761_EP0TX);
  return EFI_SUCCESS;
}

STATIC
EFI_STATUS
HandleDeviceRequest (
  IN USB_DEVICE_REQUEST  *Request
  )
{
  EFI_STATUS  Status;

  Status = EFI_SUCCESS;

  switch (Request->Request) {
  case USB_DEV_GET_DESCRIPTOR:
    Status = HandleGetDescriptor (Request);
    break;
  case USB_DEV_SET_ADDRESS:
    Status = HandleSetAddress (Request);
    break;
  case USB_DEV_SET_CONFIGURATION:
    Status = HandleSetConfiguration (Request);
    break;
  default:
    DEBUG ((EFI_D_ERROR,
      "Didn't understand RequestType 0x%x Request 0x%x\n",
      Request->RequestType, Request->Request));
      Status = EFI_INVALID_PARAMETER;
    break;
  }

  return Status;
}

// Instead of actually registering interrupt handlers, we poll the controller's
//  interrupt source register in this function.
STATIC
VOID
CheckInterrupts (
  IN EFI_EVENT  Event,
  IN VOID      *Context
  )
{
  UINT32      DcInterrupts;
  UINTN       NumBytes;
  UINTN       MoreBytes;
  UINT8       Packet[512];
  VOID       *DataPacket;
  UINT32      HandledInterrupts;
  UINT32      UnhandledInterrupts;
  EFI_STATUS  Status;

  // Set bits in HandledInterrupts to mark the interrupt source handled.
  HandledInterrupts = 0;

  WRITE_REG32 (ISP1761_DEVICE_UNLOCK, ISP1761_DEVICE_UNLOCK_MAGIC);

  DcInterrupts = READ_REG32 (ISP1761_DC_INTERRUPT);
  if (DcInterrupts & ISP1761_DC_INTERRUPT_SUSP) {
    DEBUG ((EFI_D_INFO, "USB: Suspend\n"));
    HandledInterrupts |= ISP1761_DC_INTERRUPT_SUSP;
  }
  if (DcInterrupts & ISP1761_DC_INTERRUPT_RESUME) {
    DEBUG ((EFI_D_INFO, "USB: Resume\n"));
    HandledInterrupts |= ISP1761_DC_INTERRUPT_RESUME;
  }
  if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0SETUP) {
    NumBytes = 512;
    ReadEndpointBuffer (0x20, &NumBytes, &Packet);
    ASSERT (NumBytes == 8);
    HandleDeviceRequest ((USB_DEVICE_REQUEST *) Packet);
    HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0SETUP;
  }
  if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0RX) {
    HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0RX;
  }
  if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0TX) {
    if (mControlTxPending) {
      // We previously put some data in the Control Endpoint's IN (Tx) FIFO.
      // We assume that that data has now been sent in response to the IN token
      // that triggered this interrupt. We can therefore go to the Status stage
      // of the control transfer.
      StatusAcknowledge (ISP1761_EP0TX);
      mControlTxPending = FALSE;
    }
    HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0TX;
  }
  if (DcInterrupts & ISP1761_DC_INTERRUPT_EP1RX) {
    NumBytes = 512;
    DataPacket = AllocatePool (NumBytes);
    Status = ReadEndpointBuffer (ISP1761_EP1RX, &NumBytes, DataPacket);
    if (EFI_ERROR (Status) || NumBytes == 0) {
      if (EFI_ERROR (Status)) {
        DEBUG ((EFI_D_ERROR, "Couldn't read EP1RX data: %r\n", Status));
      }
      FreePool (DataPacket);
    } else {
      // Signal this event again so we poll again ASAP
      gBS->SignalEvent (Event);
      mDataReceivedCallback (NumBytes, DataPacket);
    }
    HandledInterrupts |= ISP1761_DC_INTERRUPT_EP1RX;
  }
  if (DcInterrupts & ISP1761_DC_INTERRUPT_EP1TX) {
    mDataSentCallback (1);
    HandledInterrupts |= ISP1761_DC_INTERRUPT_EP1TX;
  }
  if (DcInterrupts & (ISP1761_DC_INTERRUPT_SOF | ISP1761_DC_INTERRUPT_PSOF)) {
    // Don't care about SOFs or pseudo-SOFs
    HandledInterrupts |= (ISP1761_DC_INTERRUPT_SOF | ISP1761_DC_INTERRUPT_PSOF);
  }
  if (ISP1761_DC_INTERRUPT_BRESET) {
    HandledInterrupts |= ISP1761_DC_INTERRUPT_BRESET;
  }
  if (ISP1761_DC_INTERRUPT_HS_STAT) {
    HandledInterrupts |= ISP1761_DC_INTERRUPT_HS_STAT;
  }
  if (ISP1761_DC_INTERRUPT_VBUS) {
    HandledInterrupts |= ISP1761_DC_INTERRUPT_VBUS;
  }

  UnhandledInterrupts = DcInterrupts & (~HandledInterrupts) & ISP1761_DC_INTERRUPT_MASK;
  if (UnhandledInterrupts) {
    DEBUG ((EFI_D_ERROR, "USB: Unhandled DC Interrupts: 0x%08x\n",
      UnhandledInterrupts));
  }

  // Check if we received any more data while we were handling the interrupt.
  SelectEndpoint (ISP1761_EP1RX);
  MoreBytes = READ_REG16 (ISP1761_BUFFER_LENGTH);
  if (MoreBytes) {
    HandledInterrupts &= ~ISP1761_DC_INTERRUPT_EP1RX;
  }

  WRITE_REG32 (ISP1761_DC_INTERRUPT, HandledInterrupts);
}

EFI_STATUS
Isp1761PeriphSend (
  IN        UINT8  EndpointIndex,
  IN        UINTN  Size,
  IN  CONST VOID  *Buffer
  )
{
  return WriteEndpointBuffer (
          (EndpointIndex << 1) | 0x1, //Convert to ISP1761 endpoint index, Tx
          MAX_PACKET_SIZE_BULK,
          Size,
          Buffer
          );
}

EFI_STATUS
EFIAPI
Isp1761PeriphStart (
  IN USB_DEVICE_DESCRIPTOR   *DeviceDescriptor,
  IN VOID                   **Descriptors,
  IN USB_DEVICE_RX_CALLBACK   RxCallback,
  IN USB_DEVICE_TX_CALLBACK   TxCallback
  )
{
  UINT16                    OtgStatus;
  UINT8                    *Ptr;
  EFI_STATUS                Status;
  EFI_EVENT                 TimerEvent;

  ASSERT (DeviceDescriptor != NULL);
  ASSERT (Descriptors[0] != NULL);
  ASSERT (RxCallback != NULL);
  ASSERT (TxCallback != NULL);

  WRITE_REG32 (ISP1761_DEVICE_UNLOCK, ISP1761_DEVICE_UNLOCK_MAGIC);

  WRITE_REG32 (ISP1761_SW_RESET_REG, ISP1761_SW_RESET_ALL);
  while (READ_REG32 (ISP1761_SW_RESET_REG) & ISP1761_SW_RESET_ALL) {
    //busy wait
  }
  WRITE_REG32 (ISP1761_MODE, ISP1761_MODE_SFRESET);
  while (READ_REG32 (ISP1761_MODE) & ISP1761_MODE_SFRESET) {
    //busy wait
  }
  DEBUG ((EFI_D_INFO, "USB: Software reset done\n"));

  WRITE_REG32 (ISP1761_DC_INTERRUPT_ENABLE, 0x03FFFFFF);
  WRITE_REG32 (ISP1761_OTG_INTERRUPT_ENABLE_RISE, 0x07FF);

  WRITE_REG8 (ISP1761_ADDRESS, ISP1761_ADDRESS_DEVEN);
  WRITE_REG8 (ISP1761_MODE, ISP1761_MODE_WKUPCS | ISP1761_MODE_CLKAON);

  // Use port 1 as peripheral controller (magic - disagrees with datasheet)
  WRITE_REG32 (ISP1761_OTG_CTRL_SET, 0xffff0000);
  WRITE_REG32 (ISP1761_OTG_CTRL_SET, 0x000014d1);

  OtgStatus = READ_REG16 (ISP1761_OTG_STATUS);
  if ((OtgStatus & ISP1761_OTG_STATUS_B_SESS_END) != 0) {
    DEBUG ((EFI_D_ERROR, "USB: Vbus not powered.\n"));
  }
  if ((OtgStatus & ISP1761_OTG_STATUS_A_B_SESS_VLD) == 0) {
    DEBUG ((EFI_D_ERROR, "USB: Session not valid.\n"));
  }

  // Configure Control endpoints
  SelectEndpoint (0x20);
  WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
  WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
  SelectEndpoint (0x0);
  WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
  WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
  SelectEndpoint (0x1);
  WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
  WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);

  // Interrupt on all ACK and NAK
  WRITE_REG32 (ISP1761_INTERRUPT_CONFIG, ISP1761_INTERRUPT_CONFIG_ACK_ONLY);

  mDeviceDescriptor = DeviceDescriptor;
  mDescriptors = Descriptors[0];

  // Right now we just support one configuration
  ASSERT (mDeviceDescriptor->NumConfigurations == 1);
  // ... and one interface
  mConfigDescriptor = (USB_CONFIG_DESCRIPTOR *)mDescriptors;
  ASSERT (mConfigDescriptor->NumInterfaces == 1);

  Ptr = ((UINT8 *) mDescriptors) + sizeof (USB_CONFIG_DESCRIPTOR);
  mInterfaceDescriptor = (USB_INTERFACE_DESCRIPTOR *) Ptr;
  Ptr += sizeof (USB_INTERFACE_DESCRIPTOR);

  mEndpointDescriptors = (USB_ENDPOINT_DESCRIPTOR *) Ptr;

  mDataReceivedCallback = RxCallback;
  mDataSentCallback = TxCallback;

  // Register a timer event so CheckInterrupts gets called periodically
  Status = gBS->CreateEvent (
                  EVT_TIMER | EVT_NOTIFY_SIGNAL,
                  TPL_CALLBACK,
                  CheckInterrupts,
                  NULL,
                  &TimerEvent
                  );
  ASSERT_EFI_ERROR (Status);
  if (EFI_ERROR (Status)) {
    return Status;
  }

  Status = gBS->SetTimer (
                  TimerEvent,
                  TimerPeriodic,
                  ISP1761_INTERRUPT_POLL_PERIOD
                  );
  ASSERT_EFI_ERROR (Status);

  return Status;
}

USB_DEVICE_PROTOCOL mUsbDevice = {
  Isp1761PeriphStart,
  Isp1761PeriphSend
};


EFI_STATUS
EFIAPI
Isp1761PeriphEntryPoint (
  IN EFI_HANDLE                            ImageHandle,
  IN EFI_SYSTEM_TABLE                      *SystemTable
  )
{
  UINT32      DeviceId;
  EFI_HANDLE  Handle;

  DeviceId = READ_REG32 (ISP1761_DEVICE_ID);

  if (DeviceId != ISP1761_DEVICE_ID_VAL) {
    DEBUG ((EFI_D_ERROR,
      "ERROR: Read incorrect device ID for ISP1761: 0x%08x, expected 0x%08x\n",
      DeviceId , ISP1761_DEVICE_ID_VAL
      ));
    return EFI_DEVICE_ERROR;
  }

  Handle = NULL;
  return gBS->InstallProtocolInterface (
    &Handle,
    &gUsbDeviceProtocolGuid,
    EFI_NATIVE_INTERFACE,
    &mUsbDevice
    );
}