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| author | Nico Huber <nico.h@gmx.de> | 2022-05-24 15:07:34 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2022-06-23 14:38:08 +0000 |
| commit | d90e2b3e2c37aa63e0dbb4e7359e8043704d815b (patch) | |
| tree | 0299fa7ae376cd15ea45bf8b2d7729c0dda0d9dd /dediprog.c | |
| parent | 418916428f38e86368c980cc7efdf5c9c615f7cd (diff) | |
| download | flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.tar.gz flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.tar.bz2 flashrom-d90e2b3e2c37aa63e0dbb4e7359e8043704d815b.zip | |
flashchips,spi25: Replace `.wrea_override` with FEATURE_4BA_EAR_1716
There are two competing sets of instructions to access the extended
address register of 4BA SPI chips. Some chips even support both sets.
So far, we assumed the 0xc5/0xc8 instructions by default and allowed
to override the write instructions with the `.wrea_override` field.
This has some disadvantages:
* The additional field is easily overlooked. So when adding a new
flash chip, one might assume only 0xc5/0xc8 are supported.
* We cannot describe flash chips completely that allow both
instructions (and some programmers may be picky about which
instructions can be used).
Therefore, replace the `.wrea_override` field with a feature flag.
Signed-off-by: Nico Huber <nico.h@gmx.de>
Change-Id: I6d82f24898acd0789203516a7456fd785907bc10
Ticket: https://ticket.coreboot.org/issues/357
Reviewed-on: https://review.coreboot.org/c/flashrom/+/64636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Diffstat (limited to 'dediprog.c')
| -rw-r--r-- | dediprog.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dediprog.c b/dediprog.c index 7a7ae3b76..42e0ed92b 100644 --- a/dediprog.c +++ b/dediprog.c @@ -416,7 +416,7 @@ static int prepare_rw_cmd( } } } else { - if (flash->chip->feature_bits & FEATURE_4BA_EAR_C5C8) { + if (flash->chip->feature_bits & FEATURE_4BA_EAR_ANY) { if (spi_set_extended_address(flash, start >> 24)) return 1; } else if (start >> 24) { |