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| author | Satheeshakrishna M <satheeshakrishna.m@intel.com> | 2014-04-08 15:46:56 +0530 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-09-24 14:52:03 +0200 |
| commit | 08524a9ffa396c56ff3fbec9cfd80edd3fa6a058 (patch) | |
| tree | b66649d4a32be25c3a8fd99d20ec2fc80c2d2ad7 | |
| parent | 7879a7ebff7b5e9313ef6c28019a0bd62046b10d (diff) | |
| download | linux-stable-08524a9ffa396c56ff3fbec9cfd80edd3fa6a058.tar.gz linux-stable-08524a9ffa396c56ff3fbec9cfd80edd3fa6a058.tar.bz2 linux-stable-08524a9ffa396c56ff3fbec9cfd80edd3fa6a058.zip | |
drm/i915/skl: Restore pipe B/C interrupts
Extending BDW implementation to gen9. Pipe B/C interrupt
restoration after exiting LPSP.
v2: Fix minor rebasing conflict.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d760e0659fa4..fa87f1ec44ec 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6277,7 +6277,7 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv) outb(inb(VGA_MSR_READ), VGA_MSR_WRITE); vga_put(dev->pdev, VGA_RSRC_LEGACY_IO); - if (IS_BROADWELL(dev)) + if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9)) gen8_irq_power_well_post_enable(dev_priv); } |