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author | Vijendar Mukunda <Vijendar.Mukunda@amd.com> | 2023-08-23 13:03:34 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2023-08-23 13:27:14 +0100 |
commit | 0a1428141f638fc6fba863de40f0dc7ea91a1d47 (patch) | |
tree | 2ce4ff56bf9a33bf26c444b601614fea07d9fa02 | |
parent | aa836152420af94d014ddd677a5f95544abef4f6 (diff) | |
download | linux-stable-0a1428141f638fc6fba863de40f0dc7ea91a1d47.tar.gz linux-stable-0a1428141f638fc6fba863de40f0dc7ea91a1d47.tar.bz2 linux-stable-0a1428141f638fc6fba863de40f0dc7ea91a1d47.zip |
ASoC: SOF: amd: enable ACP external global interrupt
Previously ACP SOF firmware used to enable the ACP external
global interrupt register.
This will restrict to report ACP host interrupts only after
firmware loading is successful.
This register needs to be set from host driver to handle
other ACP interrupts(SoundWire Interrupts) before loading
the ACP firmware.
Add field for external interrupt enable register in acp descriptor
structure and enable the external interrupt enable register.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20230823073340.2829821-2-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/sof/amd/acp.c | 3 | ||||
-rw-r--r-- | sound/soc/sof/amd/acp.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/sof/amd/acp.c b/sound/soc/sof/amd/acp.c index 630c2c5fe4c7..651b56388cb6 100644 --- a/sound/soc/sof/amd/acp.c +++ b/sound/soc/sof/amd/acp.c @@ -420,6 +420,9 @@ static int acp_reset(struct snd_sof_dev *sdev) dev_err(sdev->dev, "timeout in releasing reset\n"); snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK); + if (desc->ext_intr_enb) + snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_enb, 0x01); + return ret; } diff --git a/sound/soc/sof/amd/acp.h b/sound/soc/sof/amd/acp.h index 19cad4fcf99a..97bcada822ef 100644 --- a/sound/soc/sof/amd/acp.h +++ b/sound/soc/sof/amd/acp.h @@ -174,6 +174,7 @@ struct sof_amd_acp_desc { const char *name; unsigned int host_bridge_id; u32 pgfsm_base; + u32 ext_intr_enb; u32 ext_intr_stat; u32 dsp_intr_base; u32 sram_pte_offset; |