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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2023-01-15 00:34:54 +0100
committerNeil Armstrong <neil.armstrong@linaro.org>2023-01-19 08:57:14 +0100
commit12cdc236cf83eb55560f52dd378f05d5798452ba (patch)
tree565835e2f0ea5ae1e640887a170017294ffccddc
parentefccf602b37fc1064214e6b5fdfa9e77879a9bca (diff)
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ARM: dts: meson8: Add more L2 (PL310) cache properties
Add more L2 cache properties which are used by the 3.10 vendor kernel but have not made it upstream yet. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20230114233455.2005047-2-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-rw-r--r--arch/arm/boot/dts/meson8.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 0f8bac8bac8b..a86f6afb8f87 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -651,6 +651,9 @@
arm,filter-ranges = <0x100000 0xc0000000>;
prefetch-data = <1>;
prefetch-instr = <1>;
+ arm,prefetch-offset = <7>;
+ arm,double-linefill = <1>;
+ arm,prefetch-drop = <1>;
arm,shared-override;
};