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author | Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> | 2023-07-25 17:18:06 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2023-07-25 19:11:53 +0100 |
commit | 17aaf9ea07b656016316dc37716e987742b3e296 (patch) | |
tree | 7a1a1cc7f2fee196d94916fefc3d33ccda0ace47 | |
parent | 6eaae198076080886b9e7d57f4ae06fa782f90ef (diff) | |
download | linux-stable-17aaf9ea07b656016316dc37716e987742b3e296.tar.gz linux-stable-17aaf9ea07b656016316dc37716e987742b3e296.tar.bz2 linux-stable-17aaf9ea07b656016316dc37716e987742b3e296.zip |
spi: spi-qcom-qspi: Ignore disabled interrupts' status in isr
During FIFO/DMA modes dynamic switching, only corresponding interrupts are
enabled. However its possible that FIFO related interrupt status registers
get set during DMA mode. For example WR_FIFO_EMPTY bit is set during DMA
TX.
Ignore such status bits so that they don't trip unwanted operations.
Suggested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Fixes: b5762d95607e ("spi: spi-qcom-qspi: Add DMA mode support")
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1690285689-30233-2-git-send-email-quic_vnivarth@quicinc.com
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | drivers/spi/spi-qcom-qspi.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/spi/spi-qcom-qspi.c b/drivers/spi/spi-qcom-qspi.c index a8a683d6145c..21a13605d3b0 100644 --- a/drivers/spi/spi-qcom-qspi.c +++ b/drivers/spi/spi-qcom-qspi.c @@ -603,6 +603,9 @@ static irqreturn_t qcom_qspi_irq(int irq, void *dev_id) int_status = readl(ctrl->base + MSTR_INT_STATUS); writel(int_status, ctrl->base + MSTR_INT_STATUS); + /* Ignore disabled interrupts */ + int_status &= readl(ctrl->base + MSTR_INT_EN); + /* PIO mode handling */ if (ctrl->xfer.dir == QSPI_WRITE) { if (int_status & WR_FIFO_EMPTY) |