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author | Lucas De Marchi <lucas.demarchi@intel.com> | 2024-03-19 23:03:03 -0700 |
---|---|---|
committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2024-03-22 14:15:00 -0700 |
commit | 1bfc03b1375244f9029bb448ee8224b3b6dae99f (patch) | |
tree | d58069685d6b84540d3706d598edcb26ee237c15 | |
parent | 326e30e4624c1f15855d8241bc639c0a0cea7429 (diff) | |
download | linux-stable-1bfc03b1375244f9029bb448ee8224b3b6dae99f.tar.gz linux-stable-1bfc03b1375244f9029bb448ee8224b3b6dae99f.tar.bz2 linux-stable-1bfc03b1375244f9029bb448ee8224b3b6dae99f.zip |
drm/i915: Remove special handling for !RCS_MASK()
With both XEHPSDV and PVC removed (as platforms, most of their code
remain used by others), there's no need to handle !RCS_MASK() as
other platforms don't ever have fused-off render. Remove those code
paths and the special WA flag when initializing GuC.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Tvrtko Ursulin <tursulin@ursulin.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20240320060543.4034215-7-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 |
2 files changed, 2 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 8b9729f060b5..6fa8cde69ed9 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -497,9 +497,8 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, engine->logical_mask = BIT(logical_instance); __sprint_engine_name(engine); - if ((engine->class == COMPUTE_CLASS && !RCS_MASK(engine->gt) && - __ffs(CCS_MASK(engine->gt)) == engine->instance) || - engine->class == RENDER_CLASS) + if ((engine->class == COMPUTE_CLASS || engine->class == RENDER_CLASS) && + __ffs(CCS_MASK(engine->gt) | RCS_MASK(engine->gt)) == engine->instance) engine->flags |= I915_ENGINE_FIRST_RENDER_COMPUTE; /* features common between engines sharing EUs */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index ae829a24a151..b85706aa4aff 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -315,10 +315,6 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) if (IS_DG2_G11(gt->i915)) flags |= GUC_WA_CONTEXT_ISOLATION; - /* Wa_16015675438 */ - if (!RCS_MASK(gt)) - flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST; - /* Wa_14018913170 */ if (GUC_FIRMWARE_VER(guc) >= MAKE_GUC_VER(70, 7, 0)) { if (IS_DG2(gt->i915) || IS_METEORLAKE(gt->i915)) |