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| author | Olof Johansson <olof@lixom.net> | 2017-04-19 05:30:35 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2017-04-19 05:30:35 -0700 |
| commit | 1dfe46166f18e332bfb22d9d1217b533fa82a464 (patch) | |
| tree | d47704e5c4df8bd281255ea6035cb512d4cd458b | |
| parent | f10e8bff8252c7e9711d0bb86c2d2ef35c0ff151 (diff) | |
| parent | 23ade398c7c2809d031fe1d83ada11b3c08d73b4 (diff) | |
| download | linux-stable-1dfe46166f18e332bfb22d9d1217b533fa82a464.tar.gz linux-stable-1dfe46166f18e332bfb22d9d1217b533fa82a464.tar.bz2 linux-stable-1dfe46166f18e332bfb22d9d1217b533fa82a464.zip | |
Merge tag 'reset-for-4.12-2' of git://git.pengutronix.de/git/pza/linux into next/drivers
Reset controller changes for v4.12, part 2
Add reset lines for the NAND and eMMC contollers on LD11/LD20 SoCs.
* tag 'reset-for-4.12-2' of git://git.pengutronix.de/git/pza/linux:
reset: uniphier: add NAND and eMMC reset control
Signed-off-by: Olof Johansson <olof@lixom.net>
| -rw-r--r-- | drivers/reset/reset-uniphier.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 7af60bcff6bc..c4ba89832796 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -50,6 +50,15 @@ struct uniphier_reset_data { } /* System reset data */ +#define UNIPHIER_SLD3_SYS_RESET_NAND(id) \ + UNIPHIER_RESETX((id), 0x2004, 2) + +#define UNIPHIER_LD11_SYS_RESET_NAND(id) \ + UNIPHIER_RESETX((id), 0x200c, 0) + +#define UNIPHIER_LD11_SYS_RESET_EMMC(id) \ + UNIPHIER_RESETX((id), 0x200c, 2) + #define UNIPHIER_SLD3_SYS_RESET_STDMAC(id) \ UNIPHIER_RESETX((id), 0x2000, 10) @@ -66,11 +75,13 @@ struct uniphier_reset_data { UNIPHIER_RESETX((id), 0x2000 + 0x4 * (ch), 17) static const struct uniphier_reset_data uniphier_sld3_sys_reset_data[] = { + UNIPHIER_SLD3_SYS_RESET_NAND(2), UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* Ether, HSC, MIO */ UNIPHIER_RESET_END, }; static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { + UNIPHIER_SLD3_SYS_RESET_NAND(2), UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC, MIO, RLE */ UNIPHIER_PRO4_SYS_RESET_GIO(12), /* Ether, SATA, USB3 */ UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), @@ -79,6 +90,7 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { }; static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = { + UNIPHIER_SLD3_SYS_RESET_NAND(2), UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC */ UNIPHIER_PRO4_SYS_RESET_GIO(12), /* PCIe, USB3 */ UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), @@ -87,6 +99,7 @@ static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = { }; static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { + UNIPHIER_SLD3_SYS_RESET_NAND(2), UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC, RLE */ UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), @@ -101,11 +114,15 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { }; static const struct uniphier_reset_data uniphier_ld11_sys_reset_data[] = { + UNIPHIER_LD11_SYS_RESET_NAND(2), + UNIPHIER_LD11_SYS_RESET_EMMC(4), UNIPHIER_LD11_SYS_RESET_STDMAC(8), /* HSC, MIO */ UNIPHIER_RESET_END, }; static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { + UNIPHIER_LD11_SYS_RESET_NAND(2), + UNIPHIER_LD11_SYS_RESET_EMMC(4), UNIPHIER_LD11_SYS_RESET_STDMAC(8), /* HSC */ UNIPHIER_LD20_SYS_RESET_GIO(12), /* PCIe, USB3 */ UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */ |