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| author | Zachary Zhang <zhangzg@marvell.com> | 2018-06-29 11:16:19 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-09-29 03:06:07 -0700 |
| commit | 23ac2a32b2f8cb78e086d3902f1e7bf488590b4a (patch) | |
| tree | 6343c117f9aef50e02e55f9b6a6761b4687cb49b | |
| parent | fe87d18b14717d25e3e81a7f36e605f5f1f92c47 (diff) | |
| download | linux-stable-23ac2a32b2f8cb78e086d3902f1e7bf488590b4a.tar.gz linux-stable-23ac2a32b2f8cb78e086d3902f1e7bf488590b4a.tar.bz2 linux-stable-23ac2a32b2f8cb78e086d3902f1e7bf488590b4a.zip | |
PCI: aardvark: Size bridges before resources allocation
commit 91a2968e245d6ba616db37001fa1a043078b1a65 upstream.
The PCIE I/O and MEM resource allocation mechanism is that root bus
goes through the following steps:
1. Check PCI bridges' range and computes I/O and Mem base/limits.
2. Sort all subordinate devices I/O and MEM resource requirements and
allocate the resources and writes/updates subordinate devices'
requirements to PCI bridges I/O and Mem MEM/limits registers.
Currently, PCI Aardvark driver only handles the second step and lacks
the first step, so there is an I/O and MEM resource allocation failure
when using a PCI switch. This commit fixes that by sizing bridges
before doing the resource allocation.
Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller
driver")
Signed-off-by: Zachary Zhang <zhangzg@marvell.com>
[Thomas: edit commit log.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/pci/host/pci-aardvark.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c index 9bfc22b5da4b..5f3048e75bec 100644 --- a/drivers/pci/host/pci-aardvark.c +++ b/drivers/pci/host/pci-aardvark.c @@ -954,6 +954,7 @@ static int advk_pcie_probe(struct platform_device *pdev) bus = bridge->bus; + pci_bus_size_bridges(bus); pci_bus_assign_resources(bus); list_for_each_entry(child, &bus->children, node) |