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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-07-05 17:56:38 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-31 07:27:05 +0200 |
| commit | 270972df68fbe20e379771d870b1446f7255f64d (patch) | |
| tree | c630e96096c9a01e803214278b197941989363af | |
| parent | 9eb4f2886db31f4735c334d69ddae1d8deca02e9 (diff) | |
| download | linux-stable-270972df68fbe20e379771d870b1446f7255f64d.tar.gz linux-stable-270972df68fbe20e379771d870b1446f7255f64d.tar.bz2 linux-stable-270972df68fbe20e379771d870b1446f7255f64d.zip | |
PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbers
[ Upstream commit 6f3ab451aa5c2cbff33197d82fe8489cbd55ad91 ]
The reset value of Primary, Secondary and Subordinate bus numbers is
zero which is a broken setup.
Program a sensible default value for Primary/Secondary/Subordinate
bus numbers.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/pci/controller/pcie-mobiveil.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 3e81e68b5ce0..2fe7ebdad2d2 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -508,6 +508,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) return err; } + /* setup bus numbers */ + value = csr_readl(pcie, PCI_PRIMARY_BUS); + value &= 0xff000000; + value |= 0x00ff0100; + csr_writel(pcie, value, PCI_PRIMARY_BUS); + /* * program Bus Master Enable Bit in Command Register in PAB Config * Space |