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author | Joshua Aberback <Joshua.Aberback@amd.com> | 2017-01-09 14:43:08 -0500 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 17:09:16 -0400 |
commit | 2796eaee69ce139aa5ae8047bf3071650893ce1d (patch) | |
tree | 89bc2afd557721a0cd401456ee5e2342aa2e13b0 | |
parent | 4b5e7d620901778b24a2980bbc9941eff9b47f77 (diff) | |
download | linux-stable-2796eaee69ce139aa5ae8047bf3071650893ce1d.tar.gz linux-stable-2796eaee69ce139aa5ae8047bf3071650893ce1d.tar.bz2 linux-stable-2796eaee69ce139aa5ae8047bf3071650893ce1d.zip |
drm/amd/display: When signal type of sink is none, use link type for stream
Signed-off-by: Joshua Aberback <Joshua.Aberback@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index a82f2d6ea80f..59770bc9c8fe 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -984,19 +984,20 @@ static void update_stream_signal(struct core_stream *stream) { const struct dc_sink *dc_sink = stream->public.sink; - stream->signal = dc_sink->sink_signal; - /* For asic supports dual link DVI, we should adjust signal type - * based on timing pixel clock. If pixel clock more than 165Mhz, - * signal is dual link, otherwise, single link. - */ - if (dc_sink->sink_signal == SIGNAL_TYPE_DVI_SINGLE_LINK || - dc_sink->sink_signal == SIGNAL_TYPE_DVI_DUAL_LINK) { - if (stream->public.timing.pix_clk_khz > - TMDS_MAX_PIXEL_CLOCK_IN_KHZ) + if (dc_sink->sink_signal == SIGNAL_TYPE_NONE) + stream->signal = stream->sink->link->public.connector_signal; + else if (dc_sink->sink_signal == SIGNAL_TYPE_DVI_SINGLE_LINK || + dc_sink->sink_signal == SIGNAL_TYPE_DVI_DUAL_LINK) + /* For asic supports dual link DVI, we should adjust signal type + * based on timing pixel clock. If pixel clock more than 165Mhz, + * signal is dual link, otherwise, single link. + */ + if (stream->public.timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ) stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK; else stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK; - } + else + stream->signal = dc_sink->sink_signal; } bool resource_is_stream_unchanged( |