diff options
author | Qingqing Zhuo <Qingqing.Zhuo@amd.com> | 2023-08-03 01:41:55 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-08-30 15:51:14 -0400 |
commit | 284246a1c32b69a8f486c4d37669cc588b86a3fd (patch) | |
tree | fa764b0791e194995d1d3582996583c9d7c3208d | |
parent | bd831267c603fdc40c9d99ae34f9a11d57bdd10c (diff) | |
download | linux-stable-284246a1c32b69a8f486c4d37669cc588b86a3fd.tar.gz linux-stable-284246a1c32b69a8f486c4d37669cc588b86a3fd.tar.bz2 linux-stable-284246a1c32b69a8f486c4d37669cc588b86a3fd.zip |
drm/amd/display: Add DCN35 DWB
[Why & How]
Add DWB handling for DCN35.
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.c | 58 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.h | 59 |
2 files changed, 117 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.c new file mode 100644 index 000000000000..b23a809999ed --- /dev/null +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright 2023 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "reg_helper.h" +#include "dcn35_dwb.h" + +#define REG(reg)\ + dwbc30->dwbc_regs->reg + +#define CTX \ + dwbc30->base.ctx + +#undef FN +#define FN(reg_name, field_name) \ + ((const struct dcn35_dwbc_shift *)(dwbc30->dwbc_shift))->field_name, \ + ((const struct dcn35_dwbc_mask *)(dwbc30->dwbc_mask)) \ + ->field_name + +#define DC_LOGGER \ + dwbc30->base.ctx->logger + +void dcn35_dwbc_construct(struct dcn30_dwbc *dwbc30, + struct dc_context *ctx, + const struct dcn30_dwbc_registers *dwbc_regs, + const struct dcn35_dwbc_shift *dwbc_shift, + const struct dcn35_dwbc_mask *dwbc_mask, + int inst) +{ + dcn30_dwbc_construct(dwbc30, ctx, dwbc_regs, + (const struct dcn30_dwbc_shift *)dwbc_shift, + (const struct dcn30_dwbc_mask *)dwbc_mask, inst); +} + +void dcn35_dwbc_set_fgcg(struct dcn30_dwbc *dwbc30, bool enable) +{ + REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_FGCG_REP_DIS, !enable); +} diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.h b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.h new file mode 100644 index 000000000000..877f93c8168e --- /dev/null +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dwb.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright 2023 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef __DCN35_DWB_H +#define __DCN35_DWB_H + +#include "resource.h" +#include "dwb.h" +#include "dcn30/dcn30_dwb.h" + +#define DWBC_COMMON_MASK_SH_LIST_DCN35(mask_sh) \ + DWBC_COMMON_MASK_SH_LIST_DCN30(mask_sh), \ + SF_DWB2(DWB_ENABLE_CLK_CTRL, DWB_TOP, 0, DWB_FGCG_REP_DIS, mask_sh) + +#define DWBC_REG_FIELD_LIST_DCN3_5(type) \ + struct { \ + DWBC_REG_FIELD_LIST_DCN3_0(type); \ + type DWB_FGCG_REP_DIS; \ + } + +struct dcn35_dwbc_mask { + DWBC_REG_FIELD_LIST_DCN3_5(uint32_t); +}; + +struct dcn35_dwbc_shift { + DWBC_REG_FIELD_LIST_DCN3_5(uint8_t); +}; + +void dcn35_dwbc_construct(struct dcn30_dwbc *dwbc30, + struct dc_context *ctx, + const struct dcn30_dwbc_registers *dwbc_regs, + const struct dcn35_dwbc_shift *dwbc_shift, + const struct dcn35_dwbc_mask *dwbc_mask, + int inst); + +void dcn35_dwbc_set_fgcg(struct dcn30_dwbc *dwbc30, bool enable); + +#endif |