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| author | Marc Zyngier <maz@kernel.org> | 2020-12-10 08:30:59 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-12-22 10:47:09 +0000 |
| commit | 2a5f1b67ec577fb1544b563086e0377f095f88e2 (patch) | |
| tree | 0495ce4bc64645d89d59758d44f08f0a8fdda041 | |
| parent | 3a514592b698588326924625b6948a10c35fadd5 (diff) | |
| download | linux-stable-2a5f1b67ec577fb1544b563086e0377f095f88e2.tar.gz linux-stable-2a5f1b67ec577fb1544b563086e0377f095f88e2.tar.bz2 linux-stable-2a5f1b67ec577fb1544b563086e0377f095f88e2.zip | |
KVM: arm64: Don't access PMCR_EL0 when no PMU is available
We reset the guest's view of PMCR_EL0 unconditionally, based on
the host's view of this register. It is however legal for an
implementation not to provide any PMU, resulting in an UNDEF.
The obvious fix is to skip the reset of this shadow register
when no PMU is available, sidestepping the issue entirely.
If no PMU is available, the guest is not able to request
a virtual PMU anyway, so not doing nothing is the right thing
to do!
It is unlikely that this bug can hit any HW implementation
though, as they all provide a PMU. It has been found using nested
virt with the host KVM not implementing the PMU itself.
Fixes: ab9468340d2bc ("arm64: KVM: Add access handler for PMCR register")
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201210083059.1277162-1-maz@kernel.org
| -rw-r--r-- | arch/arm64/kvm/sys_regs.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 3313dedfa505..d46e7f706cb0 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -594,6 +594,10 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) { u64 pmcr, val; + /* No PMU available, PMCR_EL0 may UNDEF... */ + if (!kvm_arm_support_pmu_v3()) + return; + pmcr = read_sysreg(pmcr_el0); /* * Writable bits of PMCR_EL0 (ARMV8_PMU_PMCR_MASK) are reset to UNKNOWN |