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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-30 16:58:21 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-30 20:32:07 +0000 |
| commit | 2b64e616d5527063f528321c391a9bc825715b93 (patch) | |
| tree | f765629c3c111cf32fa0146eca9a7c602960aa62 | |
| parent | 4b0dd4a29a8f323e74cc91f7fba41cdf12d0430c (diff) | |
| download | linux-stable-2b64e616d5527063f528321c391a9bc825715b93.tar.gz linux-stable-2b64e616d5527063f528321c391a9bc825715b93.tar.bz2 linux-stable-2b64e616d5527063f528321c391a9bc825715b93.zip | |
drm/i915/gt: Leave RING_BB_STATE to default value
Do not reset RING_BB_STATE, leaving it to the default state value. This
prevents bdw/bsw from getting confused when executing batches from the
GGTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191230165821.3840449-2-chris@chris-wilson.co.uk
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_lrc.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 14e7e179855f..00895f83f61e 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -3968,7 +3968,6 @@ static void init_common_reg_state(u32 * const regs, CTX_CTRL_RS_CTX_ENABLE); regs[CTX_RING_CTL] = RING_CTL_SIZE(ring->size) | RING_VALID; - regs[CTX_BB_STATE] = RING_BB_PPGTT; } static void init_wa_bb_reg_state(u32 * const regs, |