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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2018-05-03 22:36:37 +0300
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2018-05-04 10:00:07 +0100
commit3ad1d32744ef4f0eb92b1989ef7b488cb7dc740d (patch)
treef50951d4d63a4e4786177d793d0b5426bd89f11d
parent0ee40820989b330e24926d82953ffb9e1c7a8425 (diff)
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PCI: rcar: Poll PHYRDY in rcar_pcie_hw_init()
In all the R-Car gen1/2/3 manuals, we are instructed to poll PCIEPHYSR for PHYRDY=1 at an early stage of the PCIEC initialization -- while the driver only does this on R-Car H1 (polling a PHY specific register). Add the PHYRDY polling to rcar_pcie_hw_init(). Note that without the special PHY driver on the R-Car V3H (R8A77980) the PCIEC initialization just freezes the kernel -- adding the PHYRDY polling allows the init code to exit gracefully on timeout (PHY starts powered down after reset on this SoC). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--drivers/pci/host/pcie-rcar.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index e403c5206b24..fa084477a3cd 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -37,6 +37,8 @@
#define PCIECDR 0x000020
#define PCIEMSR 0x000028
#define PCIEINTXR 0x000400
+#define PCIEPHYSR 0x0007f0
+#define PHYRDY BIT(0)
#define PCIEMSITXR 0x000840
/* Transfer control */
@@ -527,6 +529,20 @@ static void phy_write_reg(struct rcar_pcie *pcie,
phy_wait_for_ack(pcie);
}
+static int rcar_pcie_wait_for_phyrdy(struct rcar_pcie *pcie)
+{
+ unsigned int timeout = 10;
+
+ while (timeout--) {
+ if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY)
+ return 0;
+
+ msleep(5);
+ }
+
+ return -ETIMEDOUT;
+}
+
static int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie)
{
unsigned int timeout = 10;
@@ -551,6 +567,10 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
/* Set mode */
rcar_pci_write_reg(pcie, 1, PCIEMSR);
+ err = rcar_pcie_wait_for_phyrdy(pcie);
+ if (err)
+ return err;
+
/*
* Initial header for port config space is type 1, set the device
* class to match. Hardware takes care of propagating the IDSETR