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author | Ovidiu Bunea <ovidiu.bunea@amd.com> | 2023-10-25 13:05:47 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-11-07 12:03:30 -0500 |
commit | 3e18d4bd9ac627d8262661272ea1e60631c2608e (patch) | |
tree | 97cdddce932cd65f4d3cc33cc165c07f64130df6 | |
parent | d0ef62bd109c2af3ba8dc16a6d5ad4a0f30e03dc (diff) | |
download | linux-stable-3e18d4bd9ac627d8262661272ea1e60631c2608e.tar.gz linux-stable-3e18d4bd9ac627d8262661272ea1e60631c2608e.tar.bz2 linux-stable-3e18d4bd9ac627d8262661272ea1e60631c2608e.zip |
drm/amd/display: Disable OTG for mode timing switch on DCN35
[why]
Doing a mode timing change causes a hang when OTG is not disabled.
[how]
Add link_enc null check in disable_otg_wa to cover this case.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c index 085ac191c94f..0fa4fcd00de2 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c @@ -124,7 +124,8 @@ static void dcn35_disable_otg_wa(struct clk_mgr *clk_mgr_base, struct dc_state * if (pipe->top_pipe || pipe->prev_odm_pipe) continue; - if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal))) { + if (pipe->stream && (pipe->stream->dpms_off || dc_is_virtual_signal(pipe->stream->signal) || + !pipe->stream->link_enc)) { struct stream_encoder *stream_enc = pipe->stream_res.stream_enc; if (disable) { |