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| author | Dmitry Osipenko <digetx@gmail.com> | 2021-06-01 05:31:12 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-07-25 14:36:14 +0200 |
| commit | 41e2bcca23f1833402d1ec570519aa3486ea30fe (patch) | |
| tree | e5c150cdf4ab40d47b5281c4753a11337e16a4ea | |
| parent | 7ad965c8a723f68d44894cc00cfe7cb90ee2830d (diff) | |
| download | linux-stable-41e2bcca23f1833402d1ec570519aa3486ea30fe.tar.gz linux-stable-41e2bcca23f1833402d1ec570519aa3486ea30fe.tar.bz2 linux-stable-41e2bcca23f1833402d1ec570519aa3486ea30fe.zip | |
memory: tegra: Fix compilation warnings on 64bit platforms
[ Upstream commit e0740fb869730110b36a4afcf05ad1b9d6f5fb6d ]
Fix compilation warning on 64bit platforms caused by implicit promotion
of 32bit signed integer to a 64bit unsigned value which happens after
enabling compile-testing of the EMC drivers.
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/memory/tegra/tegra124-emc.c | 4 | ||||
| -rw-r--r-- | drivers/memory/tegra/tegra30-emc.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index 76ace42a688a..dae816e840a9 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -265,8 +265,8 @@ #define EMC_PUTERM_ADJ 0x574 #define DRAM_DEV_SEL_ALL 0 -#define DRAM_DEV_SEL_0 (2 << 30) -#define DRAM_DEV_SEL_1 (1 << 30) +#define DRAM_DEV_SEL_0 BIT(31) +#define DRAM_DEV_SEL_1 BIT(30) #define EMC_CFG_POWER_FEATURES_MASK \ (EMC_CFG_DYN_SREF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_SR | \ diff --git a/drivers/memory/tegra/tegra30-emc.c b/drivers/memory/tegra/tegra30-emc.c index 055af0e08a2e..1bd6d3d827aa 100644 --- a/drivers/memory/tegra/tegra30-emc.c +++ b/drivers/memory/tegra/tegra30-emc.c @@ -145,8 +145,8 @@ #define EMC_SELF_REF_CMD_ENABLED BIT(0) #define DRAM_DEV_SEL_ALL (0 << 30) -#define DRAM_DEV_SEL_0 (2 << 30) -#define DRAM_DEV_SEL_1 (1 << 30) +#define DRAM_DEV_SEL_0 BIT(31) +#define DRAM_DEV_SEL_1 BIT(30) #define DRAM_BROADCAST(num) \ ((num) > 1 ? DRAM_DEV_SEL_ALL : DRAM_DEV_SEL_0) |