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| author | Alexander Usyskin <alexander.usyskin@intel.com> | 2016-10-19 01:34:48 +0300 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2017-02-23 03:54:20 +0000 |
| commit | 47e1befd550ccacf735afb640d17cf55e4d4b8ec (patch) | |
| tree | 16c24005eec167b25837ffa76ec4802bf05c81f9 | |
| parent | 2992aceed9a9d3ad2755e7b8e26fd25ddc984712 (diff) | |
| download | linux-stable-47e1befd550ccacf735afb640d17cf55e4d4b8ec.tar.gz linux-stable-47e1befd550ccacf735afb640d17cf55e4d4b8ec.tar.bz2 linux-stable-47e1befd550ccacf735afb640d17cf55e4d4b8ec.zip | |
mei: txe: don't clean an unprocessed interrupt cause.
commit 43605e293eb13c07acb546c14f407a271837af17 upstream.
SEC registers are not accessible when the TXE device is in low power
state, hence the SEC interrupt cannot be processed if device is not
awake.
In some rare cases entrance to low power state (aliveness off) and input
ready bits can be signaled at the same time, resulting in communication
stall as input ready won't be signaled again after waking up. To resolve
this IPC_HHIER_SEC bit in HHISR_REG should not be cleaned if the
interrupt is not processed.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
| -rw-r--r-- | drivers/misc/mei/hw-txe.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/misc/mei/hw-txe.c b/drivers/misc/mei/hw-txe.c index 93273783dec5..1cb7d9a820df 100644 --- a/drivers/misc/mei/hw-txe.c +++ b/drivers/misc/mei/hw-txe.c @@ -876,11 +876,13 @@ static bool mei_txe_check_and_ack_intrs(struct mei_device *dev, bool do_ack) hisr = mei_txe_br_reg_read(hw, HISR_REG); aliveness = mei_txe_aliveness_get(dev); - if (hhisr & IPC_HHIER_SEC && aliveness) + if (hhisr & IPC_HHIER_SEC && aliveness) { ipc_isr = mei_txe_sec_reg_read_silent(hw, SEC_IPC_HOST_INT_STATUS_REG); - else + } else { ipc_isr = 0; + hhisr &= ~IPC_HHIER_SEC; + } generated = generated || (hisr & HISR_INT_STS_MSK) || |