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author | Dinh Nguyen <dinguyen@altera.com> | 2013-10-24 03:18:30 -0500 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2013-11-27 12:48:51 -0800 |
commit | 4d04391cfe6446fb2f184d063b56a4dcce425334 (patch) | |
tree | 078732b400a508899f4f8c63c4709047bed2220a | |
parent | f881591dd4d522b44722eb6b78c6a01a9c1bbd7c (diff) | |
download | linux-stable-4d04391cfe6446fb2f184d063b56a4dcce425334.tar.gz linux-stable-4d04391cfe6446fb2f184d063b56a4dcce425334.tar.bz2 linux-stable-4d04391cfe6446fb2f184d063b56a4dcce425334.zip |
clk: socfpga: Remove check for "reg" property in socfpga_clk_init
The function socfpga_clk_init() can support clocks that do not have a divider
register, but a fixed-divider that can be read from DTS. Therefore, the "reg"
property is not a failing condition for socfpga_clk_init().
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r-- | drivers/clk/socfpga/clk.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c index 81dd31a686df..c3784899f002 100644 --- a/drivers/clk/socfpga/clk.c +++ b/drivers/clk/socfpga/clk.c @@ -121,9 +121,7 @@ static __init struct clk *socfpga_clk_init(struct device_node *node, int rc; u32 fixed_div; - rc = of_property_read_u32(node, "reg", ®); - if (WARN_ON(rc)) - return NULL; + of_property_read_u32(node, "reg", ®); socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL); if (WARN_ON(!socfpga_clk)) |