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| author | Anup Patel <apatel@ventanamicro.com> | 2023-11-24 12:39:05 +0530 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-01-10 07:04:06 -0800 |
| commit | 50942ad6ddb57d3cfe2e4fc1f08714d54b2565ef (patch) | |
| tree | b864de67cc86e031f8f6d117502452a388c3e3d4 | |
| parent | 88ead68e764cd164abb965e258c4e18841433ecf (diff) | |
| download | linux-stable-50942ad6ddb57d3cfe2e4fc1f08714d54b2565ef.tar.gz linux-stable-50942ad6ddb57d3cfe2e4fc1f08714d54b2565ef.tar.bz2 linux-stable-50942ad6ddb57d3cfe2e4fc1f08714d54b2565ef.zip | |
RISC-V: Enable SBI based earlycon support
Let us enable SBI based earlycon support in defconfig for both RV32
and RV64 so that "earlycon=sbi" can be used again.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20231124070905.1043092-6-apatel@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | arch/riscv/configs/defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 905881282a7c..eaf34e871e30 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y |