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authorAric Cyr <aric.cyr@amd.com>2023-10-22 17:26:35 -0400
committerAlex Deucher <alexander.deucher@amd.com>2023-11-07 12:03:29 -0500
commit51131758c79f3f727318ee468bbb9c22666604e3 (patch)
tree715008b28ca61e8bcce776d703d0f7e640f0b499
parentf9e7d4fadc4fbd8083e8dec04fabf870f3f6ae39 (diff)
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drm/amd/display: 3.2.258
This version brings along following fixes: Update test link rate DPCD bit field to match spec Enable RCO options for dcn35 Add missing dml2 init value for dcn35 Enable DCN clock gating DCN35 Disable cm power optimization Allow 16 max_slices for DP2 DSC Fix OTG disable workaround logic Enable more IPS options Fix FRL assertion on boot Fix missing blendTF programming Update DP HPO MSA with colorimetry from test request Fix handling duplicate planes on one stream Acked-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index db4b214c636d..f02159853c46 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -49,7 +49,7 @@ struct aux_payload;
struct set_config_cmd_payload;
struct dmub_notification;
-#define DC_VER "3.2.257"
+#define DC_VER "3.2.258"
#define MAX_SURFACES 3
#define MAX_PLANES 6