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| author | Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2019-05-29 09:43:02 -0400 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2019-05-29 09:43:30 -0400 |
| commit | 5a433fccafc73e1361f65c4423b0099bbd18f67f (patch) | |
| tree | 52def23ed12c2c8ab07642247dfd5a8185d1c169 | |
| parent | 578a3ab12705aae0101f590d3a77ecafe22f9453 (diff) | |
| download | linux-stable-5a433fccafc73e1361f65c4423b0099bbd18f67f.tar.gz linux-stable-5a433fccafc73e1361f65c4423b0099bbd18f67f.tar.bz2 linux-stable-5a433fccafc73e1361f65c4423b0099bbd18f67f.zip | |
media: staging: allegro: cleanup two warnings
Sparse complains about two issues when building with i386
and COMPILE_TEST:
drivers/staging/media/allegro-dvt/allegro-core.c:1849:36: warning: constant 0xffffffff00000000UL is so big it is unsigned long long
drivers/staging/media/allegro-dvt/allegro-core.c:865:24: error: incompatible types in comparison expression (different type sizes)
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
| -rw-r--r-- | drivers/staging/media/allegro-dvt/allegro-core.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/staging/media/allegro-dvt/allegro-core.c b/drivers/staging/media/allegro-dvt/allegro-core.c index d007d1778f0e..20b38b737869 100644 --- a/drivers/staging/media/allegro-dvt/allegro-core.c +++ b/drivers/staging/media/allegro-dvt/allegro-core.c @@ -863,7 +863,7 @@ static ssize_t allegro_mbox_read(struct allegro_dev *dev, * Skip the header, as was already read to get the size of the body. */ body_no_wrap = min((size_t)header->length, - (mbox->size - (head + sizeof(*header)))); + (size_t)(mbox->size - (head + sizeof(*header)))); regmap_bulk_read(dev->sram, mbox->data + head + sizeof(*header), dst + sizeof(*header), body_no_wrap / 4); regmap_bulk_read(dev->sram, mbox->data, @@ -1846,7 +1846,7 @@ static void allegro_copy_fw_codec(struct allegro_dev *dev, lower_32_bits(icache_offset)); dcache_offset = - (dev->firmware.paddr & 0xffffffff00000000UL) - MCU_CACHE_OFFSET; + (dev->firmware.paddr & 0xffffffff00000000ULL) - MCU_CACHE_OFFSET; v4l2_dbg(2, debug, &dev->v4l2_dev, "dcache_offset: msb = 0x%x, lsb = 0x%x\n", upper_32_bits(dcache_offset), lower_32_bits(dcache_offset)); |