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author | Colin Ian King <colin.i.king@gmail.com> | 2021-12-30 15:03:21 +0000 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2022-01-05 16:33:09 -0800 |
commit | 5c58585090a9ac3fbdf45ef584caa3a755b8ceda (patch) | |
tree | 16d8ce81903fd282de04fd178b3221122ca43700 | |
parent | 08d92c7a47375ac98aa5b9cdeb3a8736b37cf6d4 (diff) | |
download | linux-stable-5c58585090a9ac3fbdf45ef584caa3a755b8ceda.tar.gz linux-stable-5c58585090a9ac3fbdf45ef584caa3a755b8ceda.tar.bz2 linux-stable-5c58585090a9ac3fbdf45ef584caa3a755b8ceda.zip |
clk: socfpga: remove redundant assignment after a mask operation
The assignment operation after a & mask operation is redundant, the
variables being assigned are not used afterwards. Replace the &=
operator with just & operator.
Cleans up two clang-scan warnings:
drivers/clk/socfpga/clk-gate.c:37:10: warning: Although the value stored
to 'l4_src' is used in the enclosing expression, the value is never
actually read from 'l4_src' [deadcode.DeadStores]
return l4_src &= 0x1;
^ ~~~
drivers/clk/socfpga/clk-gate.c:46:10: warning: Although the value stored
to 'perpll_src' is used in the enclosing expression, the value is never
actually read from 'perpll_src' [deadcode.DeadStores]
return perpll_src &= 0x3;
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://lore.kernel.org/r/20211230150321.167576-1-colin.i.king@gmail.com
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r-- | drivers/clk/socfpga/clk-gate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c index 1ec9678d8cd3..53d6e3ec4309 100644 --- a/drivers/clk/socfpga/clk-gate.c +++ b/drivers/clk/socfpga/clk-gate.c @@ -34,7 +34,7 @@ static u8 socfpga_clk_get_parent(struct clk_hw *hwclk) if (streq(name, SOCFPGA_L4_MP_CLK)) { l4_src = readl(clk_mgr_base_addr + CLKMGR_L4SRC); - return l4_src &= 0x1; + return l4_src & 0x1; } if (streq(name, SOCFPGA_L4_SP_CLK)) { l4_src = readl(clk_mgr_base_addr + CLKMGR_L4SRC); @@ -43,7 +43,7 @@ static u8 socfpga_clk_get_parent(struct clk_hw *hwclk) perpll_src = readl(clk_mgr_base_addr + CLKMGR_PERPLL_SRC); if (streq(name, SOCFPGA_MMC_CLK)) - return perpll_src &= 0x3; + return perpll_src & 0x3; if (streq(name, SOCFPGA_NAND_CLK) || streq(name, SOCFPGA_NAND_X_CLK)) return (perpll_src >> 2) & 3; |