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author | Lang Cheng <chenglang@huawei.com> | 2021-02-07 16:55:43 +0800 |
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committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-02-16 14:42:58 -0400 |
commit | 5e9914c003885402a3eb138204dba3eea997ecde (patch) | |
tree | 7cdf576a9850f8e5423331b5a7bb2c7a6bb80c12 | |
parent | 292b3352bd5bd0abeba3e8e7b5ae5acb8f7df4e0 (diff) | |
download | linux-stable-5e9914c003885402a3eb138204dba3eea997ecde.tar.gz linux-stable-5e9914c003885402a3eb138204dba3eea997ecde.tar.bz2 linux-stable-5e9914c003885402a3eb138204dba3eea997ecde.zip |
RDMA/hns: Refactor process of posting CMDQ
Simplify __hns_roce_cmq_send() then remove the redundant variables.
Link: https://lore.kernel.org/r/1612688143-28226-6-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
-rw-r--r-- | drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 42 |
1 files changed, 17 insertions, 25 deletions
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index 3b89436b01c0..012076aa35f5 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -1279,32 +1279,26 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev, { struct hns_roce_v2_priv *priv = hr_dev->priv; struct hns_roce_v2_cmq_ring *csq = &priv->cmq.csq; - struct hns_roce_cmq_desc *desc_to_use; u32 timeout = 0; - int handle = 0; u16 desc_ret; u32 tail; int ret; + int i; spin_lock_bh(&csq->lock); tail = csq->head; - while (handle < num) { - desc_to_use = &csq->desc[csq->head]; - *desc_to_use = desc[handle]; - dev_dbg(hr_dev->dev, "set cmq desc:\n"); - csq->head++; + for (i = 0; i < num; i++) { + csq->desc[csq->head++] = desc[i]; if (csq->head == csq->desc_num) csq->head = 0; - handle++; } /* Write to hardware */ roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, csq->head); - /* - * If the command is sync, wait for the firmware to write back, + /* If the command is sync, wait for the firmware to write back, * if multi descriptors to be sent, use the first one to check */ if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) { @@ -1312,26 +1306,24 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev, if (hns_roce_cmq_csq_done(hr_dev)) break; udelay(1); - timeout++; - } while (timeout < priv->cmq.tx_timeout); + } while (++timeout < priv->cmq.tx_timeout); } if (hns_roce_cmq_csq_done(hr_dev)) { - handle = 0; - ret = 0; - while (handle < num) { - /* get the result of hardware write back */ - desc_to_use = &csq->desc[tail]; - desc[handle] = *desc_to_use; - dev_dbg(hr_dev->dev, "Get cmq desc:\n"); - desc_ret = le16_to_cpu(desc[handle].retval); - if (unlikely(desc_ret != CMD_EXEC_SUCCESS)) - ret = -EIO; - - tail++; - handle++; + for (ret = 0, i = 0; i < num; i++) { + /* check the result of hardware write back */ + desc[i] = csq->desc[tail++]; if (tail == csq->desc_num) tail = 0; + + desc_ret = le16_to_cpu(desc[i].retval); + if (likely(desc_ret == CMD_EXEC_SUCCESS)) + continue; + + dev_err_ratelimited(hr_dev->dev, + "Cmdq IO error, opcode = %x, return = %x\n", + desc->opcode, desc_ret); + ret = -EIO; } } else { /* FW/HW reset or incorrect number of desc */ |