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authorMax Tseng <max.tseng@amd.com>2023-09-08 15:31:33 +0800
committerAlex Deucher <alexander.deucher@amd.com>2023-09-26 17:00:22 -0400
commit5fad7d8cc4d425524f39cc7202a8211184ac4657 (patch)
tree22542f5962bdea75567df0e35c13bea492636649
parentb308e6f3af1cb27dd710ff781c0637fa34de4eed (diff)
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drm/amd/display: augment display clock in dc_cap structure
[Why] Allow dc report maximum display clock possible at vmin Reviewed-by: Wayne Lin <wayne.lin@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Max Tseng <max.tseng@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc.h1
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c2
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c2
3 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 562b56bd1c30..0e0978561804 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -270,6 +270,7 @@ struct dc_caps {
uint16_t subvp_vertical_int_margin_us;
bool seamless_odm;
uint32_t max_v_total;
+ uint32_t max_disp_clock_khz_at_vmin;
uint8_t subvp_drr_vblank_start_margin_us;
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
index c637d8b6095a..d8fa229d78ce 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
@@ -1914,6 +1914,8 @@ static bool dcn314_resource_construct(
dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
dc->caps.color.mpc.ocsc = 1;
+ dc->caps.max_disp_clock_khz_at_vmin = 694000;
+
/* Use pipe context based otg sync logic */
dc->config.use_pipe_ctx_sync_logic = true;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
index 67ff19d4116d..10ae1b3da751 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
@@ -1832,6 +1832,8 @@ static bool dcn35_resource_construct(
dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
dc->caps.color.mpc.ocsc = 1;
+ dc->caps.max_disp_clock_khz_at_vmin = 669154;
+
/* Use pipe context based otg sync logic */
dc->config.use_pipe_ctx_sync_logic = true;
/* read VBIOS LTTPR caps */