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author | John Crispin <blogic@openwrt.org> | 2013-01-20 22:02:55 +0100 |
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committer | John Crispin <blogic@openwrt.org> | 2013-02-17 01:25:31 +0100 |
commit | 5fff610b7c60195de98e68bec00c357f393ce634 (patch) | |
tree | 408b0dfb4bd006bd626246d69c3f4ce0b687c386 | |
parent | 3a5bfe7bdbfd37c9206d7c6dfd7eb9664ccc5038 (diff) | |
download | linux-stable-5fff610b7c60195de98e68bec00c357f393ce634.tar.gz linux-stable-5fff610b7c60195de98e68bec00c357f393ce634.tar.bz2 linux-stable-5fff610b7c60195de98e68bec00c357f393ce634.zip |
MIPS: ralink: adds early_printk support
Add the code needed to make early printk work.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4897/
-rw-r--r-- | arch/mips/ralink/early_printk.c | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/mips/ralink/early_printk.c b/arch/mips/ralink/early_printk.c new file mode 100644 index 000000000000..c4ae47eb24ab --- /dev/null +++ b/arch/mips/ralink/early_printk.c @@ -0,0 +1,44 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> + */ + +#include <linux/io.h> +#include <linux/serial_reg.h> + +#include <asm/addrspace.h> + +#define EARLY_UART_BASE 0x10000c00 + +#define UART_REG_RX 0x00 +#define UART_REG_TX 0x04 +#define UART_REG_IER 0x08 +#define UART_REG_IIR 0x0c +#define UART_REG_FCR 0x10 +#define UART_REG_LCR 0x14 +#define UART_REG_MCR 0x18 +#define UART_REG_LSR 0x1c + +static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE); + +static inline void uart_w32(u32 val, unsigned reg) +{ + __raw_writel(val, uart_membase + reg); +} + +static inline u32 uart_r32(unsigned reg) +{ + return __raw_readl(uart_membase + reg); +} + +void prom_putchar(unsigned char ch) +{ + while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) + ; + uart_w32(ch, UART_REG_TX); + while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) + ; +} |