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authorDavid Gibson <david@gibson.dropbear.id.au>2005-10-13 14:28:58 +1000
committerPaul Mackerras <paulus@samba.org>2005-10-17 21:43:12 +1000
commit61f684ec074f40e2e13e750513df42c0c046689b (patch)
tree3d78d1bf0eb49b5aeb39219262c823561ba98f9b
parentea703ce20699dd85ad7954e34b71a2c7c47b6132 (diff)
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[PATCH] powerpc: Fix use of LOADBASE in merge tree
The merge-tree version of LOADBASE actually loads the whole given address from the toc for ppc64. The matching OFF macro adjust for this, using an offset of 0 for ppc64, but we weren't using that in power4_idle. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r--arch/powerpc/kernel/idle_power4.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index 5596fad6c87c..1494e2f177f7 100644
--- a/arch/powerpc/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -39,13 +39,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
* can be cleared by CPU init after the fixups are done
*/
LOADBASE(r3,cur_cpu_spec)
- ld r4,cur_cpu_spec@l(r3)
+ ld r4,OFF(cur_cpu_spec)(r3)
ld r4,CPU_SPEC_FEATURES(r4)
andi. r0,r4,CPU_FTR_CAN_NAP
beqlr
/* Now check if user or arch enabled NAP mode */
LOADBASE(r3,powersave_nap)
- lwz r4,powersave_nap@l(r3)
+ lwz r4,OFF(powersave_nap)(r3)
cmpwi 0,r4,0
beqlr