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author | Ingo Molnar <mingo@kernel.org> | 2015-05-20 11:59:45 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2015-05-20 12:01:01 +0200 |
commit | 6f56a8d024757e2f3bda8bf3bdf6aa1a21e6810b (patch) | |
tree | 923d044c9cb5e3e89fdf02af35acc050e4f39195 | |
parent | 5856afed0c8c419286d9f0c8e57e83e2875eec4b (diff) | |
parent | e88221c50cadade0eb4f7f149f4967d760212695 (diff) | |
download | linux-stable-6f56a8d024757e2f3bda8bf3bdf6aa1a21e6810b.tar.gz linux-stable-6f56a8d024757e2f3bda8bf3bdf6aa1a21e6810b.tar.bz2 linux-stable-6f56a8d024757e2f3bda8bf3bdf6aa1a21e6810b.zip |
Merge branch 'x86/urgent' into x86/fpu, to resolve a conflict
Conflicts:
arch/x86/kernel/i387.c
This commit is conflicting:
e88221c50cad ("x86/fpu: Disable XSAVES* support for now")
These functions changed a lot, move the quirk to arch/x86/kernel/fpu/init.c's
fpu__init_system_xstate_size_legacy().
Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r-- | Documentation/ABI/testing/sysfs-devices-system-cpu | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/fpu/init.c | 14 |
3 files changed, 20 insertions, 3 deletions
diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu index 99983e67c13c..da95513571ea 100644 --- a/Documentation/ABI/testing/sysfs-devices-system-cpu +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu @@ -162,7 +162,7 @@ Description: Discover CPUs in the same CPU frequency coordination domain What: /sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1} Date: August 2008 KernelVersion: 2.6.27 -Contact: discuss@x86-64.org +Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> Description: Disable L3 cache indices These files exist in every CPU's cache/index3 directory. Each diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index e535533d5ab8..20190bdac9d5 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -708,6 +708,7 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp, struct pt_regs *regs) { int i, ret = 0; + char *tmp; for (i = 0; i < mca_cfg.banks; i++) { m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i)); @@ -716,9 +717,11 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp, if (quirk_no_way_out) quirk_no_way_out(i, m, regs); } - if (mce_severity(m, mca_cfg.tolerant, msg, true) >= - MCE_PANIC_SEVERITY) + + if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) { + *msg = tmp; ret = 1; + } } return ret; } diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c index 9da740e236d5..fc878fee6a51 100644 --- a/arch/x86/kernel/fpu/init.c +++ b/arch/x86/kernel/fpu/init.c @@ -167,6 +167,20 @@ static void __init fpu__init_system_xstate_size_legacy(void) else xstate_size = sizeof(struct fregs_state); } + /* + * Quirk: we don't yet handle the XSAVES* instructions + * correctly, as we don't correctly convert between + * standard and compacted format when interfacing + * with user-space - so disable it for now. + * + * The difference is small: with recent CPUs the + * compacted format is only marginally smaller than + * the standard FPU state format. + * + * ( This is easy to backport while we are fixing + * XSAVES* support. ) + */ + setup_clear_cpu_cap(X86_FEATURE_XSAVES); } /* |