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authorAndrzej Hajda <a.hajda@samsung.com>2017-09-29 12:05:33 +0200
committerInki Dae <inki.dae@samsung.com>2017-10-26 09:06:32 +0900
commit71469944dea0e7c5d9426171a7a5fb3609b9d15f (patch)
treebf35aaee795ddc453f6772d7e74eb8ea02b4773c
parent521d98a36fd0d5fe8df46fd2c3da9503e1262513 (diff)
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drm/exynos/mixer: move mode commit to enable callback
Mode commit should not be called for every plane separately. It is enough to call it once in enable callback. The change also requires that the interlace check is moved to mixer_commit. It should be done in the same patch to avoid regression. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 499ebdca4fed..ae89e53186ee 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -477,6 +477,11 @@ static void mixer_commit(struct mixer_context *ctx)
{
struct drm_display_mode *mode = &ctx->crtc->base.state->adjusted_mode;
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ __set_bit(MXR_BIT_INTERLACE, &ctx->flags);
+ else
+ __clear_bit(MXR_BIT_INTERLACE, &ctx->flags);
+
/* setup display size */
if (ctx->mxr_ver == MXR_VER_128_0_0_184) {
u32 val = MXR_MXR_RES_HEIGHT(mode->vdisplay)
@@ -494,7 +499,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
{
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
- struct drm_display_mode *mode = &state->base.crtc->state->adjusted_mode;
struct mixer_resources *res = &ctx->mixer_res;
struct drm_framebuffer *fb = state->base.fb;
unsigned int priority = state->base.normalized_zpos + 1;
@@ -509,8 +513,7 @@ static void vp_video_buffer(struct mixer_context *ctx,
luma_addr[0] = exynos_drm_fb_dma_addr(fb, 0);
chroma_addr[0] = exynos_drm_fb_dma_addr(fb, 1);
- if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
- __set_bit(MXR_BIT_INTERLACE, &ctx->flags);
+ if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) {
if (is_tiled) {
luma_addr[1] = luma_addr[0] + 0x40;
chroma_addr[1] = chroma_addr[0] + 0x40;
@@ -519,7 +522,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
chroma_addr[1] = chroma_addr[0] + fb->pitches[0];
}
} else {
- __clear_bit(MXR_BIT_INTERLACE, &ctx->flags);
luma_addr[1] = 0;
chroma_addr[1] = 0;
}
@@ -571,7 +573,6 @@ static void vp_video_buffer(struct mixer_context *ctx,
mixer_cfg_layer(ctx, plane->index, priority, true);
mixer_cfg_vp_blend(ctx);
- mixer_commit(ctx);
spin_unlock_irqrestore(&res->reg_slock, flags);
@@ -591,7 +592,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
{
struct exynos_drm_plane_state *state =
to_exynos_plane_state(plane->base.state);
- struct drm_display_mode *mode = &state->base.crtc->state->adjusted_mode;
struct mixer_resources *res = &ctx->mixer_res;
struct drm_framebuffer *fb = state->base.fb;
unsigned int priority = state->base.normalized_zpos + 1;
@@ -637,11 +637,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
+ (state->src.x * fb->format->cpp[0])
+ (state->src.y * fb->pitches[0]);
- if (mode->flags & DRM_MODE_FLAG_INTERLACE)
- __set_bit(MXR_BIT_INTERLACE, &ctx->flags);
- else
- __clear_bit(MXR_BIT_INTERLACE, &ctx->flags);
-
spin_lock_irqsave(&res->reg_slock, flags);
/* setup format */
@@ -668,7 +663,6 @@ static void mixer_graph_buffer(struct mixer_context *ctx,
mixer_cfg_layer(ctx, win, priority, true);
mixer_cfg_gfx_blend(ctx, win, is_alpha_format(fb->format->format));
- mixer_commit(ctx);
/* layer update mandatory for mixer 16.0.33.0 */
if (ctx->mxr_ver == MXR_VER_16_0_33_0 ||
@@ -1021,6 +1015,8 @@ static void mixer_enable(struct exynos_drm_crtc *crtc)
}
mixer_win_reset(ctx);
+ mixer_commit(ctx);
+
mixer_vsync_set_update(ctx, true);
set_bit(MXR_BIT_POWERED, &ctx->flags);