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| author | Dillon Varone <Dillon.Varone@amd.com> | 2022-11-29 15:59:20 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-12-15 12:18:19 -0500 |
| commit | 752e89a70cca1c644ccc9f69c1abd6c2b95ca9d7 (patch) | |
| tree | 457aa870bf4887da095d8aed5e33433f6d8f28be | |
| parent | 46604a08c1adb44e57822304902fd23416d33739 (diff) | |
| download | linux-stable-752e89a70cca1c644ccc9f69c1abd6c2b95ca9d7.tar.gz linux-stable-752e89a70cca1c644ccc9f69c1abd6c2b95ca9d7.tar.bz2 linux-stable-752e89a70cca1c644ccc9f69c1abd6c2b95ca9d7.zip | |
drm/amd/display: run subvp validation with supported vlevel
[WHY]
Subvp portion validation currently assumes that if vlevel provided does not
support pstate, then none will, and so subvp is not used.
[HOW]
After get vlevel, use lowest vlevel that supports pstate if it
exists, and use that for subvp validation.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index efffe92eb771..2278e617164b 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -1169,6 +1169,16 @@ static void dcn32_full_validate_bw_helper(struct dc *dc, pipes[0].clks_cfg.dppclk_mhz = get_dppclk_calculated(&context->bw_ctx.dml, pipes, *pipe_cnt, 0); *vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, *pipe_cnt); + /* Check that vlevel requested supports pstate or not + * if not, select the lowest vlevel that supports it + */ + for (i = *vlevel; i < context->bw_ctx.dml.soc.num_states; i++) { + if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) { + *vlevel = i; + break; + } + } + if (*vlevel < context->bw_ctx.dml.soc.num_states && vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported && subvp_validate_static_schedulability(dc, context, *vlevel)) { |