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author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-06-19 18:34:13 +0200 |
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committer | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-06-20 11:03:03 +0200 |
commit | 7a893345a406b46b6a0f9575ce58e513cf79b997 (patch) | |
tree | 51066532982c8ec23fe88495ad492212d98fb773 | |
parent | 8e7455dd0dedf88332f249f8b1e50bc554e4c1e3 (diff) | |
download | linux-stable-7a893345a406b46b6a0f9575ce58e513cf79b997.tar.gz linux-stable-7a893345a406b46b6a0f9575ce58e513cf79b997.tar.bz2 linux-stable-7a893345a406b46b6a0f9575ce58e513cf79b997.zip |
drm/xe/guc: Move ARAT interrupts enabling to the upload step
Even though ARAT interrupts are enabled by default, we still want
to keep the code that enables them. But instead doing that in the
CTB enabling step, move this code to the upload step, where we
already setup few other registers related to GuC.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240619163413.817-1-michal.wajdeczko@intel.com
-rw-r--r-- | drivers/gpu/drm/xe/xe_guc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index 7ecb509c87d7..02c028d0e91b 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -476,6 +476,9 @@ static void guc_prepare_xfer(struct xe_guc *guc) xe_mmio_write32(gt, GUC_SHIM_CONTROL, shim_flags); xe_mmio_write32(gt, GT_PM_CONFIG, GT_DOORBELL_ENABLE); + + /* Make sure GuC receives ARAT interrupts */ + xe_mmio_rmw32(gt, PMINTRMSK, ARAT_EXPIRED_INTRMSK, 0); } /* @@ -865,9 +868,6 @@ int xe_guc_enable_communication(struct xe_guc *guc) guc_enable_irq(guc); } - xe_mmio_rmw32(guc_to_gt(guc), PMINTRMSK, - ARAT_EXPIRED_INTRMSK, 0); - err = xe_guc_ct_enable(&guc->ct); if (err) return err; |