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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-29 18:31:48 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-12-30 13:44:25 +0000 |
| commit | 7b02b23e5dd0ddd01cc7845d67eae281d52523a1 (patch) | |
| tree | ae417b4873935bca2edaaccb5f1221083d37429d | |
| parent | 987281ab02af9200e02f1d0cefc51d22dc0f5a62 (diff) | |
| download | linux-stable-7b02b23e5dd0ddd01cc7845d67eae281d52523a1.tar.gz linux-stable-7b02b23e5dd0ddd01cc7845d67eae281d52523a1.tar.bz2 linux-stable-7b02b23e5dd0ddd01cc7845d67eae281d52523a1.zip | |
drm/i915/gt: Avoid using tag 0 for the very first submission
Assume that the HW starts off with tag 0 "active" and so avoid using tag
0 for our own first ELSP submission.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191229183153.3719869-2-chris@chris-wilson.co.uk
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_lrc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 723914a41ef4..14e7e179855f 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1108,7 +1108,7 @@ __execlists_schedule_in(struct i915_request *rq) /* We don't need a strict matching tag, just different values */ ce->lrc_desc &= ~GENMASK_ULL(47, 37); ce->lrc_desc |= - (u64)(engine->context_tag++ % NUM_CONTEXT_TAG) << + (u64)(++engine->context_tag % NUM_CONTEXT_TAG) << GEN11_SW_CTX_ID_SHIFT; BUILD_BUG_ON(NUM_CONTEXT_TAG > GEN12_MAX_CONTEXT_HW_ID); } @@ -2925,6 +2925,8 @@ static void enable_execlists(struct intel_engine_cs *engine) RING_HWS_PGA, i915_ggtt_offset(engine->status_page.vma)); ENGINE_POSTING_READ(engine, RING_HWS_PGA); + + engine->context_tag = 0; } static bool unexpected_starting_state(struct intel_engine_cs *engine) |