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author | Sergio Paracuellos <sergio.paracuellos@gmail.com> | 2018-11-04 11:49:35 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-11-11 11:36:14 -0800 |
commit | 7bf10a7261c42aea8c6620038fc640683dab4603 (patch) | |
tree | 2b576e47a1905f67c26d14540dcf334346d5a8c0 | |
parent | d9ecdd396cd5037b38ebd791aae032faab89c5bc (diff) | |
download | linux-stable-7bf10a7261c42aea8c6620038fc640683dab4603.tar.gz linux-stable-7bf10a7261c42aea8c6620038fc640683dab4603.tar.bz2 linux-stable-7bf10a7261c42aea8c6620038fc640683dab4603.zip |
staging: mt7621-pci: reagroup reset related macros all together
Reset bits related macros are in different parts. Reagroup
all of them together to improve readability.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/staging/mt7621-pci/pci-mt7621.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index c9ac92e1b660..28c3f0a91075 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -45,6 +45,9 @@ #define RALINK_PCI_CONFIG_DATA 0x24 #define RALINK_PCI_MEMBASE 0x28 #define RALINK_PCI_IOBASE 0x2C + +/* RALINK_RSTCTRL bits */ +#define RALINK_PCIE_RST BIT(23) #define RALINK_PCIE0_RST BIT(24) #define RALINK_PCIE1_RST BIT(25) #define RALINK_PCIE2_RST BIT(26) @@ -74,8 +77,6 @@ #define RALINK_GPIOMODE 0x60 #define RALINK_PCIE_CLK_GEN 0x7c #define RALINK_PCIE_CLK_GEN1 0x80 -//RALINK_RSTCTRL bit -#define RALINK_PCIE_RST BIT(23) #define MEMORY_BASE 0x0 static int pcie_link_status; |