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authorgexueyuan <gexueyuan@gmail.com>2021-03-31 11:10:56 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-05-14 09:44:19 +0200
commit7cd10f8a5a9ddcd82180e212c8e168a807ad0cac (patch)
treefbd11cf28b6d7f7879016fb3a4e6001ca4266c16
parent6b18f6ac820e2845a511ea91a5af17b2a2d4e14d (diff)
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memory: pl353: fix mask of ECC page_size config register
[ Upstream commit 25dcca7fedcd4e31cb368ad846bfd738c0c6307c ] The mask for page size of ECC Configuration Register should be 0x3, according to the datasheet of PL353 smc. Fixes: fee10bd22678 ("memory: pl353: Add driver for arm pl353 static memory controller") Signed-off-by: gexueyuan <gexueyuan@gmail.com> Link: https://lore.kernel.org/r/20210331031056.5326-1-gexueyuan@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--drivers/memory/pl353-smc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/pl353-smc.c b/drivers/memory/pl353-smc.c
index 73bd3023202f..b42804b1801e 100644
--- a/drivers/memory/pl353-smc.c
+++ b/drivers/memory/pl353-smc.c
@@ -63,7 +63,7 @@
/* ECC memory config register specific constants */
#define PL353_SMC_ECC_MEMCFG_MODE_MASK 0xC
#define PL353_SMC_ECC_MEMCFG_MODE_SHIFT 2
-#define PL353_SMC_ECC_MEMCFG_PGSIZE_MASK 0xC
+#define PL353_SMC_ECC_MEMCFG_PGSIZE_MASK 0x3
#define PL353_SMC_DC_UPT_NAND_REGS ((4 << 23) | /* CS: NAND chip */ \
(2 << 21)) /* UpdateRegs operation */