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author | Shiju Jose <shiju.jose@huawei.com> | 2018-12-07 21:08:08 +0000 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2018-12-07 15:57:01 -0800 |
commit | 8fc9d3e3b46b1aa881d897c1405516ee8c7c6f43 (patch) | |
tree | 25bb72040b7c93d29bcff6ad1dbf0aee51bda619 | |
parent | 7838f908e251497502092e625f2053398c23516b (diff) | |
download | linux-stable-8fc9d3e3b46b1aa881d897c1405516ee8c7c6f43.tar.gz linux-stable-8fc9d3e3b46b1aa881d897c1405516ee8c7c6f43.tar.bz2 linux-stable-8fc9d3e3b46b1aa881d897c1405516ee8c7c6f43.zip |
net: hns3: handle hw errors of PPP PF
This patch handles PF hw errors of PPP(Programmable Packet Processor).
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c index e48d45fce101..33efa99e23f9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c @@ -112,8 +112,8 @@ static const struct hclge_hw_error hclge_ppp_mpf_abnormal_int_st1[] = { { /* sentinel */ } }; -static const struct hclge_hw_error hclge_ppp_pf_int[] = { - { .int_msk = BIT(0), .msg = "Tx_vlan_tag_err" }, +static const struct hclge_hw_error hclge_ppp_pf_abnormal_int[] = { + { .int_msk = BIT(0), .msg = "tx_vlan_tag_err" }, { .int_msk = BIT(1), .msg = "rss_list_tc_unassigned_queue_err" }, { /* sentinel */ } }; @@ -385,12 +385,16 @@ static int hclge_config_ppp_error_interrupt(struct hclge_dev *hdev, u32 cmd, cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN); desc[0].data[1] = cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT1_EN); + desc[0].data[4] = cpu_to_le32(HCLGE_PPP_PF_ERR_INT_EN); } desc[1].data[0] = cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT0_EN_MASK); desc[1].data[1] = cpu_to_le32(HCLGE_PPP_MPF_ECC_ERR_INT1_EN_MASK); + if (hdev->pdev->revision >= 0x21) + desc[1].data[2] = + cpu_to_le32(HCLGE_PPP_PF_ERR_INT_EN_MASK); } else if (cmd == HCLGE_PPP_CMD1_INT_CMD) { if (en) { desc[0].data[0] = @@ -850,6 +854,13 @@ int hclge_handle_hw_msix_error(struct hclge_dev *hdev, goto msi_error; } + /* read and log PPP PF errors */ + desc_data = (__le32 *)&desc[2]; + status = le32_to_cpu(*desc_data); + if (status) + hclge_log_error(dev, "PPP_PF_ABNORMAL_INT_ST0", + &hclge_ppp_pf_abnormal_int[0], status); + /* clear all PF MSIx errors */ hclge_cmd_reuse_desc(&desc[0], false); desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); |