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| author | Conor Dooley <conor.dooley@microchip.com> | 2023-10-20 14:18:39 +0100 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-12-06 12:06:18 +0000 |
| commit | 98d62e97c39f9b54143d504290481bed96b9bab2 (patch) | |
| tree | d21d83e3793bc1c92b768dc85f2ab0377bcf8f46 | |
| parent | a066f906ba396ab00d4af19fc5fad42b2605582a (diff) | |
| download | linux-stable-98d62e97c39f9b54143d504290481bed96b9bab2.tar.gz linux-stable-98d62e97c39f9b54143d504290481bed96b9bab2.tar.bz2 linux-stable-98d62e97c39f9b54143d504290481bed96b9bab2.zip | |
dt-bindings: soc: microchip: add a property for system controller flash
The system controller "shares" a SPI flash device with a QSPI controller
in the MSS. This flash is used to store FPGA bitstreams & other
metadata. IAP and Auto Upgrade both write images to this flash that the
System Controller will use to re-program the FPGA.
Add a phandle property signifying which flash device is connected to the
system controller.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| -rw-r--r-- | Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml index 365a9fed5914..a3fa04f3a1bd 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml @@ -26,6 +26,16 @@ properties: compatible: const: microchip,mpfs-sys-controller + microchip,bitstream-flash: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The SPI flash connected to the system controller's QSPI controller. + The system controller may retrieve FPGA bitstreams from this flash to + perform In-Application Programming (IAP) or during device initialisation + for Auto Update. The MSS and system controller have separate QSPI + controllers and this flash is connected to both. Software running in the + MSS can write bitstreams to the flash. + required: - compatible - mboxes |