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authorNoam Camus <noamca@mellanox.com>2017-05-28 09:52:04 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-08-28 15:17:36 -0700
commitab1e8660c1bb2aa6ca3fbbc7e97cc2a5ffe1599b (patch)
treee8a1ec354ca949fb23a6643df410f605899c0688
parent30b7af252e8fef6bf2fc311ca654c40bd0552220 (diff)
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ARC: [plat-eznps] disabled stall counter due to a HW bug
This counter represents threshold for consecutive stall which would trigger HW threads scheduling. However when enabled, low threshhold values cause performance degradation and in the worst case even livelock. So disable it by resorting to HW reset value Signed-off-by: Noam Camus <noamca@mellanox.com> Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> [vgupta: fixed changelog]
-rw-r--r--arch/arc/plat-eznps/mtm.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arc/plat-eznps/mtm.c b/arch/arc/plat-eznps/mtm.c
index aaaaffd3d940..e0cb36b03d2e 100644
--- a/arch/arc/plat-eznps/mtm.c
+++ b/arch/arc/plat-eznps/mtm.c
@@ -119,8 +119,6 @@ void mtm_enable_core(unsigned int cpu)
mt_ctrl.value = 0;
mt_ctrl.hsen = 1;
mt_ctrl.hs_cnt = MT_CTRL_HS_CNT;
- mt_ctrl.sten = 1;
- mt_ctrl.st_cnt = MT_CTRL_ST_CNT;
mt_ctrl.mten = 1;
write_aux_reg(CTOP_AUX_MT_CTRL, mt_ctrl.value);