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| author | Ayaz A Siddiqui <ayaz.siddiqui@intel.com> | 2021-09-03 14:51:49 +0530 |
|---|---|---|
| committer | Ramalingam C <ramalingam.c@intel.com> | 2021-09-03 20:17:20 +0530 |
| commit | b62aa57e3c78d749a1932b636c8fa4e1ef655f4d (patch) | |
| tree | ae0cac4a6557d7c75130ef9638295b996cbfa1d3 | |
| parent | 450cede7f3804ca7f8b3da210ebefa61c0958f22 (diff) | |
| download | linux-stable-b62aa57e3c78d749a1932b636c8fa4e1ef655f4d.tar.gz linux-stable-b62aa57e3c78d749a1932b636c8fa4e1ef655f4d.tar.bz2 linux-stable-b62aa57e3c78d749a1932b636c8fa4e1ef655f4d.zip | |
drm/i915/gt: Add support of mocs propagation
Now there are lots of Command and registers that require mocs index
programming.
So propagating mocs_index from mocs to gt so that it can be
used directly without having platform-specific checks.
V2:
Changed 'i915_mocs_index_gt' to anonymous structure.
Cc: CQ Tang<cq.tang@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210903092153.535736-2-ayaz.siddiqui@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gt.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gt_types.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_mocs.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_mocs.h | 1 |
4 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 62d40c986642..2aeaae036a6f 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -682,6 +682,8 @@ int intel_gt_init(struct intel_gt *gt) goto err_pm; } + set_mocs_index(gt); + err = intel_engines_init(gt); if (err) goto err_engines; diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h index a81e21bf1bd1..6fdcde64c180 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h @@ -192,6 +192,10 @@ struct intel_gt { unsigned long mslice_mask; } info; + + struct { + u8 uc_index; + } mocs; }; enum intel_gt_scratch_field { diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c index 582c4423b95d..7ccac15d9a33 100644 --- a/drivers/gpu/drm/i915/gt/intel_mocs.c +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c @@ -22,6 +22,7 @@ struct drm_i915_mocs_table { unsigned int size; unsigned int n_entries; const struct drm_i915_mocs_entry *table; + u8 uc_index; }; /* Defines for the tables (XXX_MOCS_0 - XXX_MOCS_63) */ @@ -340,14 +341,18 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915, { unsigned int flags; + memset(table, 0, sizeof(struct drm_i915_mocs_table)); + if (IS_DG1(i915)) { table->size = ARRAY_SIZE(dg1_mocs_table); table->table = dg1_mocs_table; + table->uc_index = 1; table->n_entries = GEN9_NUM_MOCS_ENTRIES; } else if (GRAPHICS_VER(i915) >= 12) { table->size = ARRAY_SIZE(tgl_mocs_table); table->table = tgl_mocs_table; table->n_entries = GEN9_NUM_MOCS_ENTRIES; + table->uc_index = 3; } else if (GRAPHICS_VER(i915) == 11) { table->size = ARRAY_SIZE(icl_mocs_table); table->table = icl_mocs_table; @@ -504,6 +509,14 @@ static u32 global_mocs_offset(void) return i915_mmio_reg_offset(GEN12_GLOBAL_MOCS(0)); } +void set_mocs_index(struct intel_gt *gt) +{ + struct drm_i915_mocs_table table; + + get_mocs_settings(gt->i915, &table); + gt->mocs.uc_index = table.uc_index; +} + void intel_mocs_init(struct intel_gt *gt) { struct drm_i915_mocs_table table; diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.h b/drivers/gpu/drm/i915/gt/intel_mocs.h index d83274f5163b..8a09d64b115f 100644 --- a/drivers/gpu/drm/i915/gt/intel_mocs.h +++ b/drivers/gpu/drm/i915/gt/intel_mocs.h @@ -36,5 +36,6 @@ struct intel_gt; void intel_mocs_init(struct intel_gt *gt); void intel_mocs_init_engine(struct intel_engine_cs *engine); +void set_mocs_index(struct intel_gt *gt); #endif |