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| author | Thanh Quan <thanh.quan.xn@renesas.com> | 2024-04-02 16:37:52 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-04-08 11:12:32 +0200 |
| commit | c0516eb4cf04ac61b6fe1f86cc15b2f5f024ee78 (patch) | |
| tree | e74973afcea064a6ed1705dbea500b4985995a85 | |
| parent | 9c85158585214770a232ff2efdbdb0e75704743f (diff) | |
| download | linux-stable-c0516eb4cf04ac61b6fe1f86cc15b2f5f024ee78.tar.gz linux-stable-c0516eb4cf04ac61b6fe1f86cc15b2f5f024ee78.tar.bz2 linux-stable-c0516eb4cf04ac61b6fe1f86cc15b2f5f024ee78.zip | |
clk: renesas: r8a779h0: Add timer clocks
Add the module clocks used by Timer (CMT/TMU) blocks on the Renesas
R-Car V4M (R8A779H0) SoC.
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/79a66e8ff84378d7f65d5f55cfb01b9b745edd12.1712068639.git.geert+renesas@glider.be
| -rw-r--r-- | drivers/clk/renesas/r8a779h0-cpg-mssr.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index 4bc35bc91254..a7d272285db0 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -192,7 +192,16 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = { DEF_MOD("sdhi0", 706, R8A779H0_CLK_SD0), DEF_MOD("sydm1", 709, R8A779H0_CLK_S0D6_PER), DEF_MOD("sydm2", 710, R8A779H0_CLK_S0D6_PER), + DEF_MOD("tmu0", 713, R8A779H0_CLK_SASYNCRT), + DEF_MOD("tmu1", 714, R8A779H0_CLK_SASYNCPERD2), + DEF_MOD("tmu2", 715, R8A779H0_CLK_SASYNCPERD2), + DEF_MOD("tmu3", 716, R8A779H0_CLK_SASYNCPERD2), + DEF_MOD("tmu4", 717, R8A779H0_CLK_SASYNCPERD2), DEF_MOD("wdt1:wdt0", 907, R8A779H0_CLK_R), + DEF_MOD("cmt0", 910, R8A779H0_CLK_R), + DEF_MOD("cmt1", 911, R8A779H0_CLK_R), + DEF_MOD("cmt2", 912, R8A779H0_CLK_R), + DEF_MOD("cmt3", 913, R8A779H0_CLK_R), DEF_MOD("pfc0", 915, R8A779H0_CLK_CP), DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), DEF_MOD("pfc2", 917, R8A779H0_CLK_CP), |