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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2016-07-05 23:12:05 +0300
committerMark Brown <broonie@kernel.org>2016-07-07 12:04:47 +0200
commitca80ef718b12eebe247b776d4b97a5e571bb489d (patch)
treebc6a15a1c298e795f511234aefc800e2e4dac0f9
parente379d2cd35ca0a9e2a2578f40cf75632266f5741 (diff)
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spi: pxa2xx-pci: Support both chipselects on Braswell
The commit 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on Intel Braswell") introduces a support of chipselects for Intel Braswell SPI host controller. Though it missed to convert the PCI part of the driver. Do conversion here which enables both chipselects on Intel Braswell when enumerated via PCI. We don't care about num_chipselect value since it is overrided inside core driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-pxa2xx-pci.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index 5953edc86ec8..f3df522db93b 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -127,21 +127,21 @@ static struct pxa_spi_info spi_info_configs[] = {
.rx_param = &byt_rx_param,
},
[PORT_BSW0] = {
- .type = LPSS_BYT_SSP,
+ .type = LPSS_BSW_SSP,
.port_id = 0,
.setup = lpss_spi_setup,
.tx_param = &bsw0_tx_param,
.rx_param = &bsw0_rx_param,
},
[PORT_BSW1] = {
- .type = LPSS_BYT_SSP,
+ .type = LPSS_BSW_SSP,
.port_id = 1,
.setup = lpss_spi_setup,
.tx_param = &bsw1_tx_param,
.rx_param = &bsw1_rx_param,
},
[PORT_BSW2] = {
- .type = LPSS_BYT_SSP,
+ .type = LPSS_BSW_SSP,
.port_id = 2,
.setup = lpss_spi_setup,
.tx_param = &bsw2_tx_param,