diff options
author | Paul Mundt <lethal@linux-sh.org> | 2008-02-14 15:09:27 +0900 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-02-25 18:49:44 +0900 |
commit | cc645a020510cf68332a71394a32c1eacb92c6ed (patch) | |
tree | 32ea3d54ef2583adbf73cd452a4a24e48d06c5fb | |
parent | bfa274e2436fc7ef72ef51c878083647f1cfd429 (diff) | |
download | linux-stable-cc645a020510cf68332a71394a32c1eacb92c6ed.tar.gz linux-stable-cc645a020510cf68332a71394a32c1eacb92c6ed.tar.bz2 linux-stable-cc645a020510cf68332a71394a32c1eacb92c6ed.zip |
sh: Rename SH-3 CCR3 reg to avoid synclink_cs clash.
drivers/char/pcmcia/synclink_cs.c:284:1: warning: "CCR3" redefined
In file included from include/asm/cache.h:13,
from include/asm/processor_32.h:15,
from include/asm/processor.h:60,
from include/linux/prefetch.h:14,
from include/linux/list.h:8,
from include/linux/module.h:9,
from drivers/char/pcmcia/synclink_cs.c:38:
include/asm/cpu/cache.h:38:1: warning: this is the location of the previous definition
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/kernel/cpu/sh3/probe.c | 4 | ||||
-rw-r--r-- | include/asm-sh/cpu-sh3/cache.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c index fcc80bb7bee7..10f2a760c5ee 100644 --- a/arch/sh/kernel/cpu/sh3/probe.c +++ b/arch/sh/kernel/cpu/sh3/probe.c @@ -94,9 +94,9 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void) boot_cpu_data.dcache.way_incr = (1 << 13); boot_cpu_data.dcache.entry_mask = 0x1ff0; boot_cpu_data.dcache.sets = 512; - ctrl_outl(CCR_CACHE_32KB, CCR3); + ctrl_outl(CCR_CACHE_32KB, CCR3_REG); #else - ctrl_outl(CCR_CACHE_16KB, CCR3); + ctrl_outl(CCR_CACHE_16KB, CCR3_REG); #endif #endif } diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h index 56bd838b7db4..bee2d81c56bf 100644 --- a/include/asm-sh/cpu-sh3/cache.h +++ b/include/asm-sh/cpu-sh3/cache.h @@ -35,7 +35,7 @@ defined(CONFIG_CPU_SUBTYPE_SH7710) || \ defined(CONFIG_CPU_SUBTYPE_SH7720) || \ defined(CONFIG_CPU_SUBTYPE_SH7721) -#define CCR3 0xa40000b4 +#define CCR3_REG 0xa40000b4 #define CCR_CACHE_16KB 0x00010000 #define CCR_CACHE_32KB 0x00020000 #endif |