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| author | Serge Semin <Sergey.Semin@baikalelectronics.ru> | 2022-06-24 17:34:24 +0300 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-07-05 19:00:52 -0500 |
| commit | d6bdbcd8bfe134566035d3eabed915ed27a04320 (patch) | |
| tree | 79b25909ddba04471c1dbaa1032d7bbe6af9c4c9 | |
| parent | a37beefbde8802a4eab2545fee1b1780a03f2aa0 (diff) | |
| download | linux-stable-d6bdbcd8bfe134566035d3eabed915ed27a04320.tar.gz linux-stable-d6bdbcd8bfe134566035d3eabed915ed27a04320.tar.bz2 linux-stable-d6bdbcd8bfe134566035d3eabed915ed27a04320.zip | |
PCI: dwc: Move io_cfg_atu_shared to struct pcie_port
The io_cfg_atu_shared flag is set if there is an outbound iATU window used
for both config space accesses and IO port transfers.
Since the flag semantic is purely Root Port specific, it's not used in
either the DW PCIe common code or in the DW PCIe Endpoint driver. Move it
to the struct pcie_port and rename to cfg0_io_shared.
[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20220624143428.8334-15-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-host.c | 6 | ||||
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.h | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 089a32811868..af4ace7e3579 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -492,7 +492,7 @@ static int dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn, ret = pci_generic_config_read(bus, devfn, where, size, val); - if (!ret && pci->io_cfg_atu_shared) + if (!ret && pp->cfg0_io_shared) dw_pcie_prog_outbound_atu(pci, 0, PCIE_ATU_TYPE_IO, pp->io_base, pp->io_bus_addr, pp->io_size); @@ -508,7 +508,7 @@ static int dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn, ret = pci_generic_config_write(bus, devfn, where, size, val); - if (!ret && pci->io_cfg_atu_shared) + if (!ret && pp->cfg0_io_shared) dw_pcie_prog_outbound_atu(pci, 0, PCIE_ATU_TYPE_IO, pp->io_base, pp->io_bus_addr, pp->io_size); @@ -627,7 +627,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp) PCIE_ATU_TYPE_IO, pp->io_base, pp->io_bus_addr, pp->io_size); else - pci->io_cfg_atu_shared = true; + pp->cfg0_io_shared = true; } if (pci->num_ob_windows <= atu_idx) diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 8ba239292634..13bffa3eaed6 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -179,6 +179,7 @@ struct dw_pcie_host_ops { struct pcie_port { bool has_msi_ctrl:1; + bool cfg0_io_shared:1; u64 cfg0_base; void __iomem *va_cfg0_base; u32 cfg0_size; @@ -274,7 +275,6 @@ struct dw_pcie { int link_gen; u8 n_fts[2]; bool iatu_unroll_enabled: 1; - bool io_cfg_atu_shared: 1; }; #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp) |