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author | Vidya Sagar <vidyas@nvidia.com> | 2022-09-19 20:03:39 +0530 |
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committer | Lorenzo Pieralisi <lpieralisi@kernel.org> | 2022-10-27 14:40:59 +0200 |
commit | e32e1e26c4098d8a866ce09fd26d8004da4ddf9e (patch) | |
tree | c77841ac8ff9ee4275bd28e6a4cca240744fb4e0 | |
parent | 66110361281b2f7da0c8bd51eaf1f152f4236035 (diff) | |
download | linux-stable-e32e1e26c4098d8a866ce09fd26d8004da4ddf9e.tar.gz linux-stable-e32e1e26c4098d8a866ce09fd26d8004da4ddf9e.tar.bz2 linux-stable-e32e1e26c4098d8a866ce09fd26d8004da4ddf9e.zip |
PCI: Add PCI_PTM_CAP_RES macro
Add macro defining Responder capable bit in Precision Time Measurement
capability register.
Link: https://lore.kernel.org/r/20220919143340.4527-2-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
-rw-r--r-- | include/uapi/linux/pci_regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 57b8e2ffb1dd..1c3591c8e09e 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -1058,6 +1058,7 @@ /* Precision Time Measurement */ #define PCI_PTM_CAP 0x04 /* PTM Capability */ #define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */ +#define PCI_PTM_CAP_RES 0x00000002 /* Responder capable */ #define PCI_PTM_CAP_ROOT 0x00000004 /* Root capable */ #define PCI_PTM_GRANULARITY_MASK 0x0000FF00 /* Clock granularity */ #define PCI_PTM_CTRL 0x08 /* PTM Control */ |