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author | Herve Codina <herve.codina@bootlin.com> | 2024-06-20 14:01:24 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2024-06-21 12:12:42 +0100 |
commit | e5efa3ff412dd1d3ff266be1eea6ee47c9d951c4 (patch) | |
tree | 6dbad448c91e8c487079c3087e4c69e5d45233fc | |
parent | 4fce809e4062b7e73642dfb3f5abf86026ea14f0 (diff) | |
download | linux-stable-e5efa3ff412dd1d3ff266be1eea6ee47c9d951c4.tar.gz linux-stable-e5efa3ff412dd1d3ff266be1eea6ee47c9d951c4.tar.bz2 linux-stable-e5efa3ff412dd1d3ff266be1eea6ee47c9d951c4.zip |
dt-bindings: net: mscc-miim: Add resets property
Add the (optional) resets property.
The mscc-miim device is impacted by the switch reset especially when the
mscc-miim device is used as part of the LAN966x PCI device.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | Documentation/devicetree/bindings/net/mscc,miim.yaml | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/mscc,miim.yaml b/Documentation/devicetree/bindings/net/mscc,miim.yaml index 5b292e7c9e46..792f26b06b06 100644 --- a/Documentation/devicetree/bindings/net/mscc,miim.yaml +++ b/Documentation/devicetree/bindings/net/mscc,miim.yaml @@ -38,6 +38,16 @@ properties: clock-frequency: true + resets: + items: + - description: + Reset shared with all blocks attached to the Switch Core Register + Bus (CSR) including VRAP slave. + + reset-names: + items: + - const: switch + required: - compatible - reg |