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authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2014-11-17 14:35:46 +0100
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2014-11-18 20:33:55 +0100
commite802b3a2bfd4f52a9b23037800fa0965aae92013 (patch)
treea4ba32fe08303716583d06cac20d270a31f03517
parentfe354939edffe1f2579b4b372bad44e72bd9a9b3 (diff)
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ARM: dts: berlin: add BG2CD nodes for USB support
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role capable. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-rw-r--r--arch/arm/boot/dts/berlin2cd.dtsi36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 9e338ff80fd3..230df3b1770e 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -75,6 +75,22 @@
clocks = <&chip CLKID_TWD>;
};
+ usb_phy0: usb-phy@b74000 {
+ compatible = "marvell,berlin2cd-usb-phy";
+ reg = <0xb74000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x178 23>;
+ status = "disabled";
+ };
+
+ usb_phy1: usb-phy@b78000 {
+ compatible = "marvell,berlin2cd-usb-phy";
+ reg = <0xb78000 0x128>;
+ #phy-cells = <0>;
+ resets = <&chip 0x178 24>;
+ status = "disabled";
+ };
+
eth1: ethernet@b90000 {
compatible = "marvell,pxa168-eth";
reg = <0xb90000 0x10000>;
@@ -287,6 +303,26 @@
};
};
+ usb0: usb@ed0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xed0000 0x200>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB0>;
+ phys = <&usb_phy0>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
+ usb1: usb@ee0000 {
+ compatible = "chipidea,usb2";
+ reg = <0xee0000 0x200>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_USB1>;
+ phys = <&usb_phy1>;
+ phy-names = "usb-phy";
+ status = "disabled";
+ };
+
apb@fc0000 {
compatible = "simple-bus";
#address-cells = <1>;