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author | Beniamino Galvani <b.galvani@gmail.com> | 2014-06-21 16:22:07 +0200 |
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committer | Thierry Reding <thierry.reding@gmail.com> | 2014-07-11 17:01:31 +0200 |
commit | eae266a284f370d40c50dbed7a988a744bab0d44 (patch) | |
tree | f9a13e40af79fd142993e83c3cfbbce10d4f8b6c | |
parent | 101353c82a4435aa2fc5bbd4aebafcd2d388171c (diff) | |
download | linux-stable-eae266a284f370d40c50dbed7a988a744bab0d44.tar.gz linux-stable-eae266a284f370d40c50dbed7a988a744bab0d44.tar.bz2 linux-stable-eae266a284f370d40c50dbed7a988a744bab0d44.zip |
pwm: rockchip: document device tree bindings
This adds binding documentation for Rockchip SoC PWM driver.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-rockchip.txt | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt new file mode 100644 index 000000000000..3182126189bf --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt @@ -0,0 +1,17 @@ +Rockchip PWM controller + +Required properties: + - compatible: should be "rockchip,rk2928-pwm" + - reg: physical base address and length of the controller's registers + - clocks: phandle and clock specifier of the PWM reference clock + - #pwm-cells: should be 2. See pwm.txt in this directory for a + description of the cell format. + +Example: + + pwm0: pwm@20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + clocks = <&cru PCLK_PWM01>; + #pwm-cells = <2>; + }; |