diff options
| author | Lothar Rubusch <l.rubusch@gmail.com> | 2024-04-01 19:48:59 +0000 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2024-04-06 16:18:38 +0100 |
| commit | f68ebfe1501bf1110eebf5e968c4d9186cba8706 (patch) | |
| tree | e2e09caacc48f5a6491b4dc4bd61c535e29dc689 | |
| parent | 2eef045c5231658b3d7514c6640951e0de3e9d05 (diff) | |
| download | linux-stable-f68ebfe1501bf1110eebf5e968c4d9186cba8706.tar.gz linux-stable-f68ebfe1501bf1110eebf5e968c4d9186cba8706.tar.bz2 linux-stable-f68ebfe1501bf1110eebf5e968c4d9186cba8706.zip | |
iio: accel: adxl345: Make data_range obsolete
Replace write() data_format by regmap_update_bits() to keep bus specific
pre-configuration which might have happened before on the same register.
The bus specific bits in data_format register then need to be masked out,
Remove the data_range field from the struct adxl345_data, because it is
not used anymore.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
Link: https://lore.kernel.org/r/20240401194906.56810-2-l.rubusch@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
| -rw-r--r-- | drivers/iio/accel/adxl345_core.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 8bd30a23ed3b..ff89215e90fd 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -37,7 +37,11 @@ #define ADXL345_POWER_CTL_MEASURE BIT(3) #define ADXL345_POWER_CTL_STANDBY 0x00 -#define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */ +#define ADXL345_DATA_FORMAT_RANGE GENMASK(1, 0) /* Set the g range */ +#define ADXL345_DATA_FORMAT_JUSTIFY BIT(2) /* Left-justified (MSB) mode */ +#define ADXL345_DATA_FORMAT_FULL_RES BIT(3) /* Up to 13-bits resolution */ +#define ADXL345_DATA_FORMAT_SELF_TEST BIT(7) /* Enable a self test */ + #define ADXL345_DATA_FORMAT_2G 0 #define ADXL345_DATA_FORMAT_4G 1 #define ADXL345_DATA_FORMAT_8G 2 @@ -48,7 +52,6 @@ struct adxl345_data { const struct adxl345_chip_info *info; struct regmap *regmap; - u8 data_range; }; #define ADXL345_CHANNEL(index, axis) { \ @@ -202,6 +205,10 @@ int adxl345_core_probe(struct device *dev, struct regmap *regmap) struct adxl345_data *data; struct iio_dev *indio_dev; u32 regval; + unsigned int data_format_mask = (ADXL345_DATA_FORMAT_RANGE | + ADXL345_DATA_FORMAT_JUSTIFY | + ADXL345_DATA_FORMAT_FULL_RES | + ADXL345_DATA_FORMAT_SELF_TEST); int ret; ret = regmap_read(regmap, ADXL345_REG_DEVID, ®val); @@ -218,15 +225,14 @@ int adxl345_core_probe(struct device *dev, struct regmap *regmap) data = iio_priv(indio_dev); data->regmap = regmap; - /* Enable full-resolution mode */ - data->data_range = ADXL345_DATA_FORMAT_FULL_RES; data->info = device_get_match_data(dev); if (!data->info) return -ENODEV; - ret = regmap_write(data->regmap, ADXL345_REG_DATA_FORMAT, - data->data_range); - if (ret < 0) + /* Enable full-resolution mode */ + ret = regmap_update_bits(regmap, ADXL345_REG_DATA_FORMAT, + data_format_mask, ADXL345_DATA_FORMAT_FULL_RES); + if (ret) return dev_err_probe(dev, ret, "Failed to set data range\n"); indio_dev->name = data->info->name; |